diff options
| author | whitequark <whitequark@whitequark.org> | 2018-12-05 04:50:38 +0000 |
|---|---|---|
| committer | whitequark <whitequark@whitequark.org> | 2018-12-05 17:13:27 +0000 |
| commit | 9ef078848a5b121336b83043c565ce47433eb2d8 (patch) | |
| tree | fdfa9d1c1fbe809815e8a26310d8197f3695cee6 /tests/lut/check_map.ys | |
| parent | 12596b5003bcc6180cda04ce2aaaa2a8145f8a9b (diff) | |
| download | yosys-9ef078848a5b121336b83043c565ce47433eb2d8.tar.gz yosys-9ef078848a5b121336b83043c565ce47433eb2d8.tar.bz2 yosys-9ef078848a5b121336b83043c565ce47433eb2d8.zip | |
gate2lut: new techlib, for converting Yosys gates to FPGA LUTs.
Diffstat (limited to 'tests/lut/check_map.ys')
| -rw-r--r-- | tests/lut/check_map.ys | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/tests/lut/check_map.ys b/tests/lut/check_map.ys new file mode 100644 index 000000000..6d659891f --- /dev/null +++ b/tests/lut/check_map.ys @@ -0,0 +1,13 @@ +design -save preopt + +simplemap +techmap -map +/gate2lut.v -D LUT_WIDTH=4 +select -assert-count 1 t:$lut +design -stash postopt + +design -copy-from preopt -as preopt top +design -copy-from postopt -as postopt top +equiv_make preopt postopt equiv +prep -flatten -top equiv +equiv_induct +equiv_status -assert |