aboutsummaryrefslogtreecommitdiffstats
path: root/tests/various/dynamic_part_select/reset_test.v
diff options
context:
space:
mode:
authorClaire Wolf <clifford@clifford.at>2020-04-21 18:46:52 +0200
committerGitHub <noreply@github.com>2020-04-21 18:46:52 +0200
commit9e1afde7a02e6d3a65c106f74920dcad9e678a04 (patch)
treee521580ec3e49a3e5ead7c834bc8e9664a950d58 /tests/various/dynamic_part_select/reset_test.v
parentabc8f1fcb65bb99ef4bf6fc6c6aa3126c333c68f (diff)
parentd32e56a3d1bdb36a77c0c3afad2eb4493292480b (diff)
downloadyosys-9e1afde7a02e6d3a65c106f74920dcad9e678a04.tar.gz
yosys-9e1afde7a02e6d3a65c106f74920dcad9e678a04.tar.bz2
yosys-9e1afde7a02e6d3a65c106f74920dcad9e678a04.zip
Merge pull request #1851 from YosysHQ/claire/bitselwrite
Improved rewrite code for writing to bit slice
Diffstat (limited to 'tests/various/dynamic_part_select/reset_test.v')
-rw-r--r--tests/various/dynamic_part_select/reset_test.v23
1 files changed, 23 insertions, 0 deletions
diff --git a/tests/various/dynamic_part_select/reset_test.v b/tests/various/dynamic_part_select/reset_test.v
new file mode 100644
index 000000000..29355aafb
--- /dev/null
+++ b/tests/various/dynamic_part_select/reset_test.v
@@ -0,0 +1,23 @@
+module reset_test #(parameter WIDTH=32, SELW=1, CTRLW=$clog2(WIDTH), DINW=2**SELW)
+ (input clk,
+ input [CTRLW-1:0] ctrl,
+ input [DINW-1:0] din,
+ input [SELW-1:0] sel,
+ output reg [WIDTH-1:0] dout);
+
+ reg [SELW:0] i;
+ wire [SELW-1:0] rval = {reset, {SELW-1{1'b0}}};
+ localparam SLICE = WIDTH/(SELW**2);
+ // Doing exotic reset. masking 2 LSB bits to 0, 6 MSB bits to 1 for
+ // whatever reason.
+ always @(posedge clk) begin
+ if (reset) begin: reset_mask
+ for (i = 0; i < {SELW{1'b1}}; i=i+1) begin
+ dout[i*rval+:SLICE] <= 32'hDEAD;
+ end
+ end
+ //else begin
+ dout[ctrl*sel+:SLICE] <= din;
+ //end
+ end
+endmodule