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-rw-r--r--techlibs/xilinx/abc9_map.v8
1 files changed, 4 insertions, 4 deletions
diff --git a/techlibs/xilinx/abc9_map.v b/techlibs/xilinx/abc9_map.v
index fc224e832..9913b229f 100644
--- a/techlibs/xilinx/abc9_map.v
+++ b/techlibs/xilinx/abc9_map.v
@@ -96,7 +96,7 @@ module FDRE_1 (output reg Q, input C, CE, D, R);
parameter [0:0] INIT = 1'b0;
wire $nextQ;
FDRE_1 #(
- .INIT(|0),
+ .INIT(INIT),
) _TECHMAP_REPLACE_ (
.D(D), .Q($nextQ), .C(C), .CE(CE), .R(R)
);
@@ -209,7 +209,7 @@ module FDPE_1 (output reg Q, input C, CE, D, PRE);
endmodule
module FDSE (output reg Q, input C, CE, D, S);
- parameter [0:0] INIT = 1'b0;
+ parameter [0:0] INIT = 1'b1;
parameter [0:0] IS_C_INVERTED = 1'b0;
parameter [0:0] IS_D_INVERTED = 1'b0;
parameter [0:0] IS_S_INVERTED = 1'b0;
@@ -230,10 +230,10 @@ module FDSE (output reg Q, input C, CE, D, S);
wire _TECHMAP_REPLACE_.$abc9_currQ = Q;
endmodule
module FDSE_1 (output reg Q, input C, CE, D, S);
- parameter [0:0] INIT = 1'b0;
+ parameter [0:0] INIT = 1'b1;
wire $nextQ;
FDSE_1 #(
- .INIT(|0),
+ .INIT(INIT),
) _TECHMAP_REPLACE_ (
.D(D), .Q($nextQ), .C(C), .CE(CE), .S(S)
);