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| * | | | | | | | | | | | | | | | | | | Add support for SVA labels in read_verilogClifford Wolf2019-03-073-26/+89
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | | | | | | | | | | | | | | | Add hack for handling SVA labels via VerificClifford Wolf2019-03-071-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | Merge pull request #861 from YosysHQ/verific_chparamClifford Wolf2019-03-082-3/+20
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add -chparam option to verific command
| * | | | | | | | | | | | | | | | | | | | Update help message for -chparamEddie Hung2019-03-091-1/+2
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| * | | | | | | | | | | | | | | | | | | | Add -chparam option to verific commandEddie Hung2019-03-091-2/+18
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| * | | | | | | | | | | | | | | | | | | | Fix spellingEddie Hung2019-03-091-1/+1
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* | | | | | | | | | | | | | | | | | | | Merge branch 'master' of github.com:YosysHQ/yosysClifford Wolf2019-03-076-10/+12
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| * \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ Merge pull request #856 from kprasadvnsi/masterClifford Wolf2019-03-076-10/+12
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | |/ / / / / / / / / / / / / / / / / / / | |/| | | | | | | | | | | | | | | | | | | examples/anlogic/ now also output the SVF file.
| | * | | | | | | | | | | | | | | | | | | examples/anlogic/ now also output the SVF file.Kali Prasad2019-03-066-10/+12
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* | | | | | | | | | | | | | | | | | | | | Fix handling of task output ports in clocked always blocks, fixes #857Clifford Wolf2019-03-072-15/+37
|/ / / / / / / / / / / / / / / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | Add link to SF2 / igloo2 macro library guideClifford Wolf2019-03-071-21/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | Improvements in sf2 cells_sim.vClifford Wolf2019-03-062-30/+251
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | Add sf2 techmap rules for more FF typesClifford Wolf2019-03-061-25/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | Refactor SF2 iobuf insertion, Add clkint insertionClifford Wolf2019-03-064-84/+153
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | Improve igloo2 exampleClifford Wolf2019-03-051-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | Improve igloo2 exampleClifford Wolf2019-03-052-2/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | Improvements in SF2 flow and demoClifford Wolf2019-03-054-9/+25
|/ / / / / / / / / / / / / / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | Fix spelling in pmgen/README.mdEddie Hung2019-03-051-2/+2
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* | | | | | | | | | | | | | | | | | | Improve igloo2 exmapleClifford Wolf2019-03-054-8/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | Merge pull request #842 from litghost/merge_upstreamClifford Wolf2019-03-0510-176/+570
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changes required for VPR place and route in synth_xilinx
| * | | | | | | | | | | | | | | | | | | Revert BRAM WRITE_MODE changes.Keith Rothman2019-03-041-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
| * | | | | | | | | | | | | | | | | | | Revert FF models to include IS_x_INVERTED parameters.Keith Rothman2019-03-011-6/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
| * | | | | | | | | | | | | | | | | | | Use singular for disabling of DRAM or BRAM inference.Keith Rothman2019-03-012-26/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
| * | | | | | | | | | | | | | | | | | | Modify arguments to match existing style.Keith Rothman2019-03-012-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
| * | | | | | | | | | | | | | | | | | | Changes required for VPR place and route synth_xilinx.Keith Rothman2019-03-0112-227/+600
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* | | | | | | | | | | | | | | | | | | | Merge pull request #850 from daveshah1/ecp5_warn_conflictClifford Wolf2019-03-051-2/+7
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ecp5: Demote conflicting FF init values to a warning
| * | | | | | | | | | | | | | | | | | | | ecp5: Demote conflicting FF init values to a warningDavid Shah2019-03-041-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | | | | | | | | | | | | | | | | | | | | Add missing newlineClifford Wolf2019-03-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | | Merge pull request #851 from kprasadvnsi/masterClifford Wolf2019-03-057-0/+55
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added examples/anlogic/
| * | | | | | | | | | | | | | | | | | | | | Added examples/anlogic/Kali Prasad2019-03-047-0/+55
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* | | | | | | | | | | | | | | | | | | | | Merge pull request #852 from ucb-bar/firrtlfixesClifford Wolf2019-03-052-2/+2
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ensure fid() calls make_id() for consistency; tests/simple/dff_init.v fails
| * | | | | | | | | | | | | | | | | | | | | Ensure fid() calls make_id() for consistency; tests/simple/dff_init.v failsJim Lawson2019-03-042-2/+2
| |/ / / / / / / / / / / / / / / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mark dff_init.v as expected to fail since it uses "initial value".
* / / / / / / / / / / / / / / / / / / / / Use "write_edif -pvector bra" for Xilinx EDIF filesClifford Wolf2019-03-051-1/+1
|/ / / / / / / / / / / / / / / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | Improve igloo2 exampleClifford Wolf2019-03-032-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | Update igloo2 example to Libero v12.0Clifford Wolf2019-03-032-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | Merge pull request #848 from YosysHQ/clifford/fix763Clifford Wolf2019-03-021-1/+5
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix error for wire decl in always block, fixes 763
| * | | | | | | | | | | | | | | | | | | | Fix error for wire decl in always block, fixes #763Clifford Wolf2019-03-021-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | | Merge pull request #849 from YosysHQ/clifford/dynportsClifford Wolf2019-03-024-1/+24
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | |/ / / / / / / / / / / / / / / / / / / / |/| | | | | | | | | | | | | | | | | | | | Only run derive on blackbox modules when ports have dynamic size
| * | | | | | | | | | | | | | | | | | | | Only run derive on blackbox modules when ports have dynamic sizeClifford Wolf2019-03-024-1/+24
|/ / / / / / / / / / / / / / / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | Fix $global_clock handling vs autowireClifford Wolf2019-03-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | Merge pull request #847 from YosysHQ/clifford/fix785Clifford Wolf2019-03-021-0/+35
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix $readmem[hb] for mem2reg memories, fixes #785
| * | | | | | | | | | | | | | | | | | | | Fix $readmem[hb] for mem2reg memories, fixes #785Clifford Wolf2019-03-021-0/+35
|/ / / / / / / / / / / / / / / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | Merge pull request #843 from YosysHQ/clifford/mem2regconstidxClifford Wolf2019-03-022-0/+13
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use mem2reg on memories that only have constant-index write ports
| * | | | | | | | | | | | | | | | | | | | Use mem2reg on memories that only have constant-index write portsClifford Wolf2019-03-012-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | | Merge pull request #845 from YosysHQ/clifford/travisnomacosClifford Wolf2019-03-021-5/+5
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | |_|/ / / / / / / / / / / / / / / / / / / |/| | | | | | | | | | | | | | | | | | | | Disable macOS builds in Travis
| * | | | | | | | | | | | | | | | | | | | Disable macOS builds in TravisClifford Wolf2019-03-021-5/+5
|/ / / / / / / / / / / / / / / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | Try again for passes/pmgen/ice40_dsp_pm.h ruleLarry Doolittle2019-03-012-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested on both in-tree and out-of-tree builds
* | | | | | | | | | | | | | | | | | | | Minor improvements in READMEClifford Wolf2019-03-011-3/+16
|/ / / / / / / / / / / / / / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* / / / / / / / / / / / / / / / / / / Fix "write_edif -gndvccy"Clifford Wolf2019-03-011-1/+1
|/ / / / / / / / / / / / / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | Merge pull request #841 from mmicko/masterClifford Wolf2019-03-011-2/+3
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | |_|_|_|_|_|_|_|_|_|_|/ / / / / / / |/| | | | | | | | | | | | | | | | | Fix ECP5 cells_sim for iverilog
generated by cgit v1.2.3 (git 2.25.1) at 2025-05-01 19:12:58 +0000