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* | | | | | | | | | | | | | | | | | | | Merge branch 'vector_fix' of https://github.com/Kmanfi/yosysClaire Wolf2020-01-291-1/+3
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also some minor fixes to the original PR.
| * | | | | | | | | | | | | | | | | | | | Fix input vector for reduce cells. Infinite loop fixed.Kaj Tuomi2017-10-171-0/+2
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| * | | | | | | | | | | | | | | | | | | | Merge branch 'master' of https://github.com/cliffordwolf/yosys into vector_fixKaj Tuomi2017-10-173-1/+54
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| * | | | | | | | | | | | | | | | | | | | | Add Verific fairness/liveness supportClifford Wolf2017-10-121-11/+32
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* | | | | | | | | | | | | | | | | | | | | | Merge pull request #1662 from YosysHQ/dave/opt-reduce-move-checkClaire Wolf2020-01-291-1/+2
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | opt_reduce: Call check() per run rather than per optimised cell
| * | | | | | | | | | | | | | | | | | | | | | opt_reduce: Call check() per run rather than per optimised cellDavid Shah2020-01-281-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | | | | | | | | | | | | | | | | | | | | | | Merge pull request #1665 from YosysHQ/clifford/edifkeepClaire Wolf2020-01-291-9/+34
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| * | | | | | | | | | | | | | | | | | | | | | | Preserve wires with keep attribute in EDIF back-endClaire Wolf2020-01-291-9/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Claire Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | | | | | Merge pull request #1659 from YosysHQ/clifford/experimentalClaire Wolf2020-01-296-4/+56
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add log_experimental() and experimental() API and "yosys -x"
| * | | | | | | | | | | | | | | | | | | | | | | | Improve logging use of experimental featuresClaire Wolf2020-01-283-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Claire Wolf <clifford@clifford.at>
| * | | | | | | | | | | | | | | | | | | | | | | | Add log_experimental() and experimental() API and "yosys -x"Claire Wolf2020-01-276-4/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Claire Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | | | | | | Merge pull request #1510 from pumbor/masterN. Engelhardt2020-01-291-0/+13
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| * | | | | | | | | | | | | | | | | | | | | | | | | handle anonymous unions to fix #1080Patrick Eibl2019-11-211-0/+13
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* | | | | | | | | | | | | | | | | | | | | | | | | | Merge pull request #1559 from YosysHQ/efinix_test_fixMiodrag Milanović2020-01-291-1/+1
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix for non-deterministic test
| * | | | | | | | | | | | | | | | | | | | | | | | | | Updated test to use assert-maxMiodrag Milanovic2020-01-281-1/+1
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| * | | | | | | | | | | | | | | | | | | | | | | | | | Fix for non-deterministic testMiodrag Milanovic2019-12-071-1/+1
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* | | | | | | | | | | | | | | | | | | | | | | | | | | Add "help -all" and "help -celltypes" sanity testEddie Hung2020-01-281-0/+2
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* | | | | | | | | | | | | | | | | | | | | | | | | | | synth_xilinx: cleanup helpEddie Hung2020-01-281-6/+4
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* | | | | | | | | | | | | | | | | | | | | | | | | | | synth_xilinx: fix help when no active_design; fixes #1664Eddie Hung2020-01-281-2/+3
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* | | | | | | | | | | | | | | | | | | | | | | | | | | xilinx: Add simulation model for DSP48 (Virtex 4).Marcin Kościelnicki2020-01-296-45/+534
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* | | | | | | | | | | | | | | | | | | | | | | | | | Merge pull request #1660 from YosysHQ/eddie/abc9_unpermute_lutsEddie Hung2020-01-289-149/+207
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unpermute LUT ordering for ice40/ecp5/xilinx
| * | | | | | | | | | | | | | | | | | | | | | | | | | Add and use SigSpec::reverse()Eddie Hung2020-01-282-3/+5
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| * | | | | | | | | | | | | | | | | | | | | | | | | | Fix $lut input ordering -- SigSpec(std::initializer_list<>) is backwardsEddie Hung2020-01-272-2/+2
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| * | | | | | | | | | | | | | | | | | | | | | | | | | Import tests from #1628Eddie Hung2020-01-273-2/+104
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| * | | | | | | | | | | | | | | | | | | | | | | | | | xilinx/ice40/ecp5: undo permuting LUT masks in lut_mapEddie Hung2020-01-274-148/+102
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* | | | | | | | | | | | | | | | | | | | | | | | | | | Fix unresolved conflict from #1573Eddie Hung2020-01-281-1/+1
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* | | | | | | | | | | | | | | | | | | | | | | | | | | Merge pull request #1567 from YosysHQ/eddie/sat_init_warningClaire Wolf2020-01-282-1/+13
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | |_|_|_|_|/ / / / / / / / / / / / / / / / / / / / / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | sat: suppress 'Warning: ignoring initial value on non-register: ...' when init[i] = 1'bx
| * | | | | | | | | | | | | | | | | | | | | | | | | | Even more obvious testcaseEddie Hung2019-12-111-6/+5
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| * | | | | | | | | | | | | | | | | | | | | | | | | | Make testcase clearer with \o having its own initEddie Hung2019-12-111-0/+2
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| * | | | | | | | | | | | | | | | | | | | | | | | | | Suppress warning message for init[i] = 1'bxEddie Hung2019-12-111-1/+2
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| * | | | | | | | | | | | | | | | | | | | | | | | | | Add test: 'Warning: ignoring initial value on non-register: \o'Eddie Hung2019-12-111-0/+10
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* | | | | | | | | | | | | | | | | | | | | | | | | | | Merge pull request #1573 from YosysHQ/eddie/xilinx_tristateN. Engelhardt2020-01-283-1/+13
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | |_|_|_|_|_|/ / / / / / / / / / / / / / / / / / / / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | synth_xilinx: error out if tristate without '-iopad'
| * | | | | | | | | | | | | | | | | | | | | | | | | | Duplicate tribuf call, credit to @mwkmwkmwkEddie Hung2019-12-131-1/+0
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| * | | | | | | | | | | | | | | | | | | | | | | | | | Add testEddie Hung2019-12-121-0/+5
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| * | | | | | | | | | | | | | | | | | | | | | | | | | synth_xilinx: error out if tristate without '-iopad'Eddie Hung2019-12-121-0/+4
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| * | | | | | | | | | | | | | | | | | | | | | | | | | tribuf: set scratchpad boolean 'tribuf.added_something'Eddie Hung2019-12-121-1/+5
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* | | | | | | | | | | | | | | | | | | | | | | | | | | redirect fuser stderr to /dev/nullPepijn de Vos2020-01-281-1/+1
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* | | | | | | | | | | | | | | | | | | | | | | | | | | Merge pull request #1553 from whitequark/manual-dffxClaire Wolf2020-01-281-11/+90
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | |_|_|/ / / / / / / / / / / / / / / / / / / / / / / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | Document $dffe, $dffsr, $_DFFE_*, $_DFFSR_* cells
| * | | | | | | | | | | | | | | | | | | | | | | | | | manual: document $dffe, $dffsr, $_DFFE_*, $_DFFSR_* cells.whitequark2019-12-051-11/+90
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* | | | | | | | | | | | | | | | | | | | | | | | | | | Merge pull request #1619 from YosysHQ/eddie/abc9_refactorEddie Hung2020-01-2711-1397/+1820
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | |_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|/ / / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | Refactor `abc9` pass
| * | | | | | | | | | | | | | | | | | | | | | | | | | abc9_ops: add commentsEddie Hung2020-01-271-1/+13
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| * | | | | | | | | | | | | | | | | | | | | | | | | | read_aiger: set abc9_box_seq attrEddie Hung2020-01-241-0/+1
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| * | | | | | | | | | | | | | | | | | | | | | | | | | abc9: -reintegrate recover type from existing cell, check against boxidEddie Hung2020-01-231-30/+19
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| * | | | | | | | | | | | | | | | | | | | | | | | | | simple_abc9 tests to discard whitebox before write for simEddie Hung2020-01-232-2/+3
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| * | | | | | | | | | | | | | | | | | | | | | | | | | abc9: warning message if no modules selectedEddie Hung2020-01-231-0/+6
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| * | | | | | | | | | | | | | | | | | | | | | | | | | Test for (* keep *)-ed abc9_box_idEddie Hung2020-01-231-0/+16
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| * | | | | | | | | | | | | | | | | | | | | | | | | | abc9_ops: -prep_xaiger to skip (* keep *) cellsEddie Hung2020-01-231-0/+2
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| * | | | | | | | | | | | | | | | | | | | | | | | | | abc_box_id -> abc9_box_id in testEddie Hung2020-01-231-1/+1
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| * | | | | | | | | | | | | | | | | | | | | | | | | | abc9_ops -prep_dff: insert async s/r mux in holes when replacing $_DFF_*Eddie Hung2020-01-231-31/+37
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| * | | | | | | | | | | | | | | | | | | | | | | | | | alumacc: undo accidental commitEddie Hung2020-01-221-14/+5
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