| Commit message (Collapse) | Author | Age | Files | Lines | ||
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xc7dsp | Eddie Hung | 2019-08-20 | 133 | -2288/+4174 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xilinx_dsp to be sensitive to keep attribute | Eddie Hung | 2019-08-15 | 1 | -1/+14 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simplify | Eddie Hung | 2019-08-15 | 1 | -4/+2 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xc7dsp | Eddie Hung | 2019-08-15 | 26 | -2242/+2277 | |
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| | * \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into xc7dsp | Eddie Hung | 2019-08-15 | 1 | -1/+5 | |
| | |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | |_|/ / / / / / / / / / / / / / / / / / / / / / / / / / / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ||||||
| | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xilinx: Rework labels for faster Verilator testing | David Shah | 2019-08-13 | 1 | -1/+5 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ffH -> ffFJKG | Eddie Hung | 2019-08-15 | 2 | -15/+15 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes for reverting SigSpec helper functions | Eddie Hung | 2019-08-14 | 2 | -10/+14 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Perform C -> PCIN optimisation after pattern matcher | Eddie Hung | 2019-08-13 | 2 | -19/+72 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Revert changes to RTLIL::SigSpec methods | Eddie Hung | 2019-08-13 | 4 | -15/+36 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only swap ports if $mul and not $__mul | Eddie Hung | 2019-08-13 | 1 | -1/+1 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add assign PCOUT = P to DSP48E1 | Eddie Hung | 2019-08-13 | 1 | -0/+2 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename to XilinxDspPass | Eddie Hung | 2019-08-13 | 1 | -3/+3 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add DSP_A_MAXWIDTH_PARTIAL, refactor | Eddie Hung | 2019-08-13 | 2 | -145/+111 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xc7dsp | Eddie Hung | 2019-08-12 | 76 | -551/+823 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check nusers of DSP output, not whole flop | Eddie Hung | 2019-08-09 | 1 | -1/+1 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Improve ice40_dsp for non-fully-32-bit adders | Eddie Hung | 2019-08-09 | 1 | -3/+8 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add wreduce to synth_ice40 -dsp as well | Eddie Hung | 2019-08-09 | 1 | -0/+1 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Another filter -> if | Eddie Hung | 2019-08-09 | 1 | -2/+2 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cleanup | Eddie Hung | 2019-08-09 | 2 | -18/+18 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pack partial-product adder DSP48E1 packing | Eddie Hung | 2019-08-09 | 3 | -10/+81 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix check | Eddie Hung | 2019-08-09 | 1 | -4/+6 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Revert "Fix typo" | Eddie Hung | 2019-08-09 | 1 | -1/+1 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit e3c39cc450a0317ad7e8234bb866d55465548c9c. | |||||
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove muxY and ffY for now | Eddie Hung | 2019-08-08 | 2 | -35/+33 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove signed from ports in +/xilinx/dsp_map.v | Eddie Hung | 2019-08-08 | 1 | -1/+1 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rework ice40_dsp to map to SB_MAC16 earlier, and check before packing | Eddie Hung | 2019-08-08 | 6 | -40/+119 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Combine techmap calls | Eddie Hung | 2019-08-08 | 1 | -2/+1 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only pack registers if {A,B,P}REG = 0, do not pack $dffe | Eddie Hung | 2019-08-08 | 1 | -3/+6 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move xilinx_dsp to before alumacc | Eddie Hung | 2019-08-08 | 1 | -6/+4 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Disable $dffe | Eddie Hung | 2019-08-08 | 1 | -8/+8 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | INMODE is 5 bits | Eddie Hung | 2019-08-08 | 1 | -1/+1 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix copy-pasta typo | Eddie Hung | 2019-08-08 | 1 | -2/+2 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ecp5: Replace '-dsp' with inverse logic '-nodsp' to match synth_xilinx | David Shah | 2019-08-08 | 1 | -11/+11 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ecp5: Bring up to date with mul2dsp changes | David Shah | 2019-08-08 | 2 | -2/+10 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into xc7dsp | David Shah | 2019-08-08 | 52 | -562/+1165 | |
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| | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix compile error | Eddie Hung | 2019-08-07 | 1 | -2/+2 | |
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| | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Run "opt_expr -fine" instead of "wreduce" due to #1213 | Eddie Hung | 2019-08-07 | 1 | -2/+1 | |
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| | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not SigSpec::extract() beyond bounds | Eddie Hung | 2019-08-07 | 2 | -8/+10 | |
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| | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xc7dsp | Eddie Hung | 2019-08-07 | 49 | -552/+1134 | |
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| | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not pack registers if (* keep *) | Eddie Hung | 2019-08-07 | 1 | -0/+20 | |
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DSP48E1 sim model: add SIMD tests | David Shah | 2019-08-08 | 3 | -3/+113 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DSP48E1 model: test CE inputs | David Shah | 2019-08-08 | 2 | -7/+17 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DSP48E1 sim model: fix seq tests and add preadder tests | David Shah | 2019-08-08 | 2 | -6/+91 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DSP48E1 sim model: seq test working | David Shah | 2019-08-08 | 3 | -16/+60 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DSP48E1 sim model: Comb, no pre-adder, mode working | David Shah | 2019-08-08 | 2 | -8/+13 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [wip] sim model testing | David Shah | 2019-08-08 | 4 | -15/+77 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [wip] sim model testing | David Shah | 2019-08-08 | 3 | -40/+360 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [wip] DSP48E1 sim model improvements | David Shah | 2019-08-07 | 1 | -6/+82 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [wip] DSP48E1 sim model improvements | David Shah | 2019-08-06 | 1 | -23/+120 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [wip] DSP48E1 sim model improvements | David Shah | 2019-08-06 | 1 | -8/+75 | |
| | |/ / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
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index : iCE40/yosys | |
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