| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Bump version | Yosys Bot | 2020-09-11 | 1 | -1/+1 |
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| * | Merge pull request #2369 from Xiretza/gitignores | Miodrag Milanović | 2020-09-10 | 3 | -2/+4 |
| |\ | | | | | Add missing gitignores for test artifacts | ||||
| | * | Add missing gitignores for test artifacts | Xiretza | 2020-08-31 | 3 | -2/+4 |
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| * | | Bump version | Yosys Bot | 2020-09-04 | 1 | -1/+1 |
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| * | | Merge pull request #2371 from whitequark/cxxrtl-debug-info | whitequark | 2020-09-03 | 3 | -30/+177 |
| |\ \ | | | | | | | cxxrtl: expose port direction and driver kind in debug information | ||||
| | * | | cxxrtl: expose driver kind in debug information. | whitequark | 2020-09-02 | 3 | -12/+112 |
| | | | | | | | | | | | | | | | | | | | This can be useful to determine whether the wire should be a part of a design checkpoint, whether it can be used to override design state, and whether driving it may cause a conflict. | ||||
| | * | | cxxrtl: improve handling of FFs with async inputs (other than CLK). | whitequark | 2020-09-02 | 1 | -22/+23 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, the meaning of "sync def" included some flip-flop cells but not others. There was no actual reason for this; it was just poorly defined. After this commit, a "sync def" means that a wire holds design state because it is connected directly to a flip-flop output, and may never be unbuffered. This is not affected by presence of async inputs. | ||||
| | * | | cxxrtl: expose port direction in debug information. | whitequark | 2020-09-02 | 3 | -5/+51 |
| | | | | | | | | | | | | | | | | | | | This can be useful to distinguish e.g. a combinatorially driven wire with type `CXXRTL_VALUE` from a module input with the same type, as well as general introspection. | ||||
| | * | | cxxrtl: fix typo in comment. NFC. | whitequark | 2020-09-02 | 1 | -1/+1 |
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| | * | | cxxrtl: fix inaccuracy in CXXRTL_ALIAS documentation. NFC. | whitequark | 2020-09-02 | 1 | -1/+1 |
| | | | | | | | | | | | | | | | | Nodes driven by a constant value have type CXXRTL_VALUE and their `next` pointer set to NULL. (This is already documented.) | ||||
| * | | | Bump version | Yosys Bot | 2020-09-03 | 1 | -1/+1 |
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| * | | Use latest verific | Miodrag Milanovic | 2020-09-02 | 1 | -1/+1 |
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| * | | Bump version | Yosys Bot | 2020-09-02 | 1 | -1/+1 |
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| * | | Merge pull request #2352 from zachjs/const-func-localparam | clairexen | 2020-09-01 | 2 | -3/+18 |
| |\ \ | | | | | | | Allow localparams in constant functions | ||||
| | * | | Allow localparams in constant functions | Zachary Snow | 2020-08-20 | 2 | -3/+18 |
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| * | | | Merge pull request #2366 from zachjs/library-format | clairexen | 2020-09-01 | 1 | -0/+11 |
| |\ \ \ | | | | | | | | | Simple support for %l format specifier | ||||
| | * | | | Simple support for %l format specifier | Zachary Snow | 2020-08-29 | 1 | -0/+11 |
| | |/ / | | | | | | | | | | | | | Yosys doesn't support libraries, so this provides the same behavior as %m, as some other tools have opted to do. | ||||
| * | | | Merge pull request #2353 from zachjs/top-scope | clairexen | 2020-09-01 | 2 | -0/+23 |
| |\ \ \ | | | | | | | | | Module name scope support | ||||
| | * | | | Module name scope support | Zachary Snow | 2020-08-20 | 2 | -0/+23 |
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| * | | | Merge pull request #2365 from zachjs/const-arg-loop-split-type | clairexen | 2020-09-01 | 2 | -3/+24 |
| |\ \ \ | | | | | | | | | Fix constant args used with function ports split across declarations | ||||
| | * | | | Fix constant args used with function ports split across declarations | Zachary Snow | 2020-08-29 | 2 | -3/+24 |
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| * | / | Bump version | Yosys Bot | 2020-09-01 | 1 | -1/+1 |
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| * | | Reorder to prevent crash | Miodrag Milanovic | 2020-08-31 | 1 | -3/+3 |
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| * | | Merge pull request #2368 from YosysHQ/verific_portrange | clairexen | 2020-08-31 | 1 | -11/+20 |
| |\ \ | | | | | | | Fix import of VHDL enums | ||||
| | * | | ast recognize lower case x and z and verific gives upper case | Miodrag Milanovic | 2020-08-30 | 1 | -2/+6 |
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| | * | | Do not check for 1 and 0 only | Miodrag Milanovic | 2020-08-30 | 1 | -6/+0 |
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| | * | | Fix import of VHDL enums | Miodrag Milanovic | 2020-08-30 | 1 | -11/+22 |
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| * | | Bump version | Yosys Bot | 2020-08-30 | 1 | -1/+1 |
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| * | | write_smt2: fix SMT-LIB tutorial URL | whitequark | 2020-08-29 | 1 | -1/+1 |
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| * | | Bump version | Yosys Bot | 2020-08-29 | 1 | -1/+1 |
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| * | | intel_alm: better map wide but shallow multiplies | Dan Ravensloft | 2020-08-28 | 1 | -2/+6 |
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| * | | Bump version | Yosys Bot | 2020-08-28 | 1 | -1/+1 |
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| * | | Merge pull request #2364 from whitequark/manual-typo | Miodrag Milanović | 2020-08-27 | 1 | -1/+1 |
| |\ \ | | | | | | | manual: fix typo | ||||
| | * | | manual: fix typo. | whitequark | 2020-08-27 | 1 | -1/+1 |
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| * | | Merge pull request #2357 from whitequark/cxxflags-MP | whitequark | 2020-08-27 | 1 | -1/+1 |
| |\ \ | | | | | | | Add -MP to CXXFLAGS | ||||
| | * | | Add -MP to CXXFLAGS. | whitequark | 2020-08-26 | 1 | -1/+1 |
| | | | | | | | | | | | | | | | | This avoids an issue where deleting or moving headers breaks the next incremental build until the outdated *.d files are deleted. | ||||
| * | | | Merge pull request #2356 from whitequark/flatten-techmap-no-tpl_driven-sigmap | whitequark | 2020-08-27 | 3 | -9/+17 |
| |\ \ \ | | | | | | | | | flatten, techmap: don't canonicalize tpl driven bits via sigmap | ||||
| | * | | | flatten, techmap: don't canonicalize tpl driven bits via sigmap. | whitequark | 2020-08-26 | 3 | -9/+17 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For connection `assign a = b;`, `sigmap(a)` returns `b`. This is exactly the opposite of the desired canonicalization for driven bits. Consider the following code: module foo(inout a, b); assign a = b; endmodule module bar(output c); foo f(c, 1'b0); endmodule Before this commit, the inout ports would be swapped after flattening (and cause a crash while attempting to drive a constant value). This issue was introduced in 9f772eb9. Fixes #2183. | ||||
| * | | | | Merge pull request #2358 from whitequark/rename-ilang-to-rtlil | whitequark | 2020-08-27 | 28 | -178/+206 |
| |\ \ \ \ | | | | | | | | | | | Replace "ILANG" with "RTLIL" everywhere | ||||
| | * | | | | Replace "ILANG" with "RTLIL" everywhere. | whitequark | 2020-08-26 | 28 | -178/+206 |
| | | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only difference between "RTLIL" and "ILANG" is that the latter is the text representation of the former, as opposed to the in-memory graph representation. This distinction serves no purpose but confuses people: it is not obvious that the ILANG backend writes RTLIL graphs. Passes `write_ilang` and `read_ilang` are provided as aliases to `write_rtlil` and `read_rtlil` for compatibility. | ||||
| * | | | | dfflegalize: Fix decision tree for adffe. | Marcelina Kościelnicka | 2020-08-27 | 1 | -1/+5 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When an adffe is being legalized, and is not natively supported, prioritize unmapping to adff over converting to dffsre if dffsre is not natively supported itself. Fixes #2361. | ||||
| * | | | | Bump version | Yosys Bot | 2020-08-27 | 1 | -1/+1 |
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| * | | | | intel_alm: Add multiply signedness to cells | Dan Ravensloft | 2020-08-26 | 7 | -16/+147 |
| |/ / / | | | | | | | | | | | | | | | | Quartus assumes unsigned multiplication by default, breaking signed multiplies, so add an input signedness parameter to the MISTRAL_MUL* cells to propagate to Quartus' <family>_mac cells. | ||||
| * | | | Merge pull request #2355 from YosysHQ/verific_improvements | Miodrag Milanović | 2020-08-26 | 1 | -1/+223 |
| |\ \ \ | |/ / |/| | | Add formal apps and template generators | ||||
| | * | | Add formal apps and template generators | Miodrag Milanovic | 2020-08-26 | 1 | -1/+223 |
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| * | | | Merge pull request #2351 from pbsds/proc_nomux | whitequark | 2020-08-26 | 1 | -1/+10 |
| |\ \ \ | |/ / |/| | | Add -nomux switch to proc | ||||
| | * | | proc: Add -nomux switch | Peder Bergebakken Sundt | 2020-08-20 | 1 | -1/+10 |
| | | | | | | | | | | | | | running proc -nomux will ommit the proc_mux pass | ||||
| * | | | Bump version | Yosys Bot | 2020-08-23 | 1 | -1/+1 |
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| * | | | Merge pull request #2349 from nmoroze/smt2-bugfix | clairexen | 2020-08-22 | 1 | -9/+20 |
| |\ \ \ | | | | | | | | | Ensure smt2 comments are associated with accessors | ||||
| | * | | | Ensure smt2 comments are associated with accessors | Noah Moroze | 2020-08-20 | 1 | -9/+20 |
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