Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Fix typographical and grammatical errors and inconsistencies. | whitequark | 2019-01-02 | 1 | -3/+3 |
| | | | | | | | | | | | | The initial list of hits was generated with the codespell command below, and each hit was evaluated and fixed manually while taking context into consideration. DIRS="kernel/ frontends/ backends/ passes/ techlibs/" DIRS="${DIRS} libs/ezsat/ libs/subcircuit" codespell $DIRS -S *.o -L upto,iff,thru,synopsys,uint More hits were found by looking through comments and strings manually. | ||||
* | Consistent use of 'override' for virtual methods in derived classes. | Henner Zeller | 2018-07-20 | 1 | -2/+2 |
| | | | | | | | | | o Not all derived methods were marked 'override', but it is a great feature of C++11 that we should make use of. o While at it: touched header files got a -*- c++ -*- for emacs to provide support for that language. o use YS_OVERRIDE for all override keywords (though we should probably use the plain keyword going forward now that C++11 is established) | ||||
* | Re-created command-reference-manual.tex, copied some doc fixes to online help | Clifford Wolf | 2015-08-14 | 1 | -1/+1 |
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* | Spell check (by Larry Doolittle) | Clifford Wolf | 2015-08-14 | 1 | -1/+1 |
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* | Fixed trailing whitespaces | Clifford Wolf | 2015-07-02 | 1 | -3/+3 |
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* | namespace Yosys | Clifford Wolf | 2014-09-27 | 1 | -0/+4 |
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* | Renamed port access function on RTLIL::Cell, added param access functions | Clifford Wolf | 2014-07-31 | 1 | -1/+1 |
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* | Refactoring: Renamed RTLIL::Design::modules to modules_ | Clifford Wolf | 2014-07-27 | 1 | -1/+1 |
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* | Refactoring: Renamed RTLIL::Module::cells to cells_ | Clifford Wolf | 2014-07-27 | 1 | -3/+3 |
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* | Manual fixes for new cell connections API | Clifford Wolf | 2014-07-26 | 1 | -3/+3 |
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* | Changed users of cell->connections_ to the new API (sed command) | Clifford Wolf | 2014-07-26 | 1 | -5/+5 |
| | | | | | | | | | git grep -l 'connections_' | xargs sed -i -r -e ' s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g; s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g; s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g; s/(->|\.)connections_.push_back/\1connect/g; s/(->|\.)connections_/\1connections()/g;' | ||||
* | Renamed RTLIL::{Module,Cell}::connections to connections_ | Clifford Wolf | 2014-07-26 | 1 | -5/+5 |
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* | SigSpec refactoring: using the accessor functions everywhere | Clifford Wolf | 2014-07-22 | 1 | -1/+1 |
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* | SigSpec refactoring: renamed chunks and width to __chunks and __width | Clifford Wolf | 2014-07-22 | 1 | -1/+1 |
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* | Removed deprecated module->new_wire() | Clifford Wolf | 2014-07-21 | 1 | -1/+1 |
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* | Added generic RTLIL::SigSpec::parse_sel() with support for selection variables | Clifford Wolf | 2014-02-06 | 1 | -3/+3 |
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* | Added "connect" command | Clifford Wolf | 2014-01-03 | 1 | -0/+185 |