| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Pack partial-product adder DSP48E1 packing | Eddie Hung | 2019-08-09 | 2 | -10/+79 |
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| * | Fix check | Eddie Hung | 2019-08-09 | 1 | -4/+6 |
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| * | Revert "Fix typo" | Eddie Hung | 2019-08-09 | 1 | -1/+1 |
| | | | | | This reverts commit e3c39cc450a0317ad7e8234bb866d55465548c9c. | ||||
| * | Remove muxY and ffY for now | Eddie Hung | 2019-08-08 | 2 | -35/+33 |
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| * | Rework ice40_dsp to map to SB_MAC16 earlier, and check before packing | Eddie Hung | 2019-08-08 | 3 | -39/+83 |
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| * | Only pack registers if {A,B,P}REG = 0, do not pack $dffe | Eddie Hung | 2019-08-08 | 1 | -3/+6 |
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| * | Disable $dffe | Eddie Hung | 2019-08-08 | 1 | -8/+8 |
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| * | Fix compile error | Eddie Hung | 2019-08-07 | 1 | -2/+2 |
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| * | Do not SigSpec::extract() beyond bounds | Eddie Hung | 2019-08-07 | 2 | -8/+10 |
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| * | Merge remote-tracking branch 'origin/master' into xc7dsp | Eddie Hung | 2019-08-07 | 10 | -87/+142 |
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| | * | Add comment | Eddie Hung | 2019-08-07 | 1 | -2/+3 |
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| | * | Revert "Add TODO" | Eddie Hung | 2019-08-07 | 1 | -2/+0 |
| | | | | | | | | | This reverts commit 6068a6bf0d91e3ab9a5eaa33894a816f1560f99a. | ||||
| | * | Add TODO | Eddie Hung | 2019-08-07 | 1 | -0/+2 |
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| | * | Compute box_lookup just once | Eddie Hung | 2019-08-07 | 1 | -8/+24 |
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| | * | Merge pull request #1213 from YosysHQ/eddie/wreduce_add | Clifford Wolf | 2019-08-07 | 2 | -3/+28 |
| | |\ | | | | | | | wreduce/opt_expr: improve width reduction for $add and $sub cells | ||||
| | | * | Move LSB-trimming functionality from wreduce to opt_expr | Eddie Hung | 2019-08-06 | 2 | -23/+26 |
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| | | * | Merge remote-tracking branch 'origin/master' into eddie/wreduce_add | Eddie Hung | 2019-08-06 | 7 | -43/+118 |
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| | | * | | Try and fix again | Eddie Hung | 2019-07-19 | 1 | -5/+4 |
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| | * | | | Tweak default gate costs, cleanup "stat -tech cmos" | Clifford Wolf | 2019-08-07 | 1 | -16/+6 |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | | | Redesign of cell cost API | Clifford Wolf | 2019-08-07 | 1 | -22/+20 |
| | | |/ | |/| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | | Add $_NMUX_, add "abc -g cmos", add proper cmos cell costs | Clifford Wolf | 2019-08-06 | 3 | -29/+67 |
| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | | Merge pull request #1242 from jfng/fix-proc_prune-partial | whitequark | 2019-08-03 | 1 | -2/+11 |
| | |\ \ | | | | | | | | | proc_prune: Promote partially redundant assignments. | ||||
| | | * | | proc_prune: Promote partially redundant assignments. | Jean-François Nguyen | 2019-08-01 | 1 | -2/+11 |
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| | * | | | Merge pull request #1238 from mmicko/vsbuild_fix | Clifford Wolf | 2019-08-02 | 1 | -0/+1 |
| | |\ \ \ | | | | | | | | | | | Visual Studio build fix | ||||
| | | * | | | Visual Studio build fix | Miodrag Milanovic | 2019-07-31 | 1 | -0/+1 |
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| | * / / | Fix formatting for msys2 mingw build using GetSize | Miodrag Milanovic | 2019-08-01 | 3 | -10/+10 |
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| * | | | Do not pack registers if (* keep *) | Eddie Hung | 2019-08-07 | 1 | -0/+20 |
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| * | | | Add comment about supporting $dffe in ice40_dsp | Eddie Hung | 2019-08-01 | 1 | -0/+1 |
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| * | | | Pack P register properly | Eddie Hung | 2019-08-01 | 1 | -2/+4 |
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| * | | | Cope with sign extension in mul2dsp | Eddie Hung | 2019-08-01 | 2 | -14/+14 |
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| * | | | Merge remote-tracking branch 'origin/master' into xc7dsp | Eddie Hung | 2019-08-01 | 1 | -2/+29 |
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| | * | | Add "stat -tech cmos" | Clifford Wolf | 2019-07-20 | 1 | -2/+29 |
| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | | CO is sign extension only if signed multiplier | Eddie Hung | 2019-08-01 | 1 | -1/+6 |
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| * | | | Fix typo | Eddie Hung | 2019-08-01 | 1 | -1/+1 |
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| * | | | Restore old CO behaviour | Eddie Hung | 2019-07-31 | 1 | -6/+7 |
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| * | | | Update test_autotb doc to reflect default value of zero | Eddie Hung | 2019-07-26 | 1 | -1/+3 |
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| * | | | Add doc for "test_autotb -seed" option | Eddie Hung | 2019-07-26 | 1 | -0/+3 |
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| * | | | Pop the CO bit from O | Eddie Hung | 2019-07-26 | 1 | -1/+3 |
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| * | | | Allow adders/accumulators with 33 bits using CO output | Eddie Hung | 2019-07-26 | 1 | -3/+8 |
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| * | | | Eliminate warnings by sizing O correctly | Eddie Hung | 2019-07-23 | 1 | -1/+5 |
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| * | | | Fix muxAB logic | Eddie Hung | 2019-07-23 | 1 | -3/+2 |
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| * | | | Remove debug print | Eddie Hung | 2019-07-23 | 1 | -1/+1 |
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| * | | | Simplify and fix for MACs | Eddie Hung | 2019-07-23 | 2 | -56/+38 |
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| * | | | Fix typo | Eddie Hung | 2019-07-23 | 1 | -13/+21 |
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| * | | | Fix spacing | Eddie Hung | 2019-07-22 | 1 | -2/+2 |
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| * | | | Pack hi and lo registers separately | Eddie Hung | 2019-07-22 | 2 | -39/+70 |
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| * | | | Rename according to vendor doc TN1295 | Eddie Hung | 2019-07-22 | 2 | -55/+55 |
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| * | | | Pack Y register | Eddie Hung | 2019-07-22 | 2 | -22/+38 |
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| * | | | Pack adders not just accumulators | Eddie Hung | 2019-07-22 | 2 | -16/+33 |
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| * | | | Restore old ffY behaviour | Eddie Hung | 2019-07-19 | 1 | -16/+5 |
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index : iCE40/yosys | |
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