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* | | | | | | Merge branch 'xaig' into xaig_dffEddie Hung2019-06-171-3/+4
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| * | | | | | Copy not move parameters/attributesEddie Hung2019-06-171-3/+4
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* | | | | | | Merge branch 'xaig' into xaig_dffEddie Hung2019-06-171-23/+26
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| * | | | | | Fix leak removing cells during ABC integration; also preserve attrEddie Hung2019-06-171-25/+26
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* | | | | | | Merge remote-tracking branch 'origin/xaig' into xaig_dffEddie Hung2019-06-171-1/+1
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| * | | | | | Re-enable &dc2Eddie Hung2019-06-171-1/+1
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| * | | | | | CleanupEddie Hung2019-06-161-51/+7
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* | | | | | | CleanupEddie Hung2019-06-151-40/+7
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* | | | | | | abc9 to recover_init by defaultEddie Hung2019-06-151-11/+6
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* | | | | | | Do not treat $__ABC_FF_ as a user cellEddie Hung2019-06-151-21/+6
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* | | | | | | CleanupEddie Hung2019-06-151-10/+7
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* | | | | | | Use $__ABC_FF_ instead of $_FF_Eddie Hung2019-06-151-13/+21
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* | | | | | | Fix initialisation of flopsEddie Hung2019-06-151-2/+3
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* | | | | | | Map to $_FF_ instead of $_DFF_P_ to prevent recursion issuesEddie Hung2019-06-151-13/+13
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* | | | | | | For now, short $_DFF_[NP]_ from ff_map.v at re-integrationEddie Hung2019-06-151-0/+8
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* | | | | | Get rid of compiler warningsEddie Hung2019-06-141-5/+5
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* | | | | | Update abc9 -D docEddie Hung2019-06-141-1/+2
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* | | | | | Enable "abc9 -D <num>" for timing-driven synthesisEddie Hung2019-06-141-9/+9
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* | | | | | Further cleanup based on @daveshah1Eddie Hung2019-06-141-10/+0
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* | | | | | Merge branch 'xaig' of github.com:YosysHQ/yosys into xaigEddie Hung2019-06-141-0/+9
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| * | | | | | ecp5: Add abc9 optionDavid Shah2019-06-141-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | | | | | | Remove extra semicolonEddie Hung2019-06-141-1/+1
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* | | | | | Rip out all non FPGA stuff from abc9Eddie Hung2019-06-121-343/+111
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* | | | | | Fix spellingEddie Hung2019-06-121-1/+1
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* | | | | | Revert "For 'stat' do not count modules with abc_box_id"Eddie Hung2019-06-121-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | This reverts commit b89bb744529fc8a5e4cd38522f86a797117f2abc.
* | | | | | Be more precise when connecting during ABC9 re-integrationEddie Hung2019-06-121-1/+3
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* | | | | | Remove hacky wideports_split from abc9Eddie Hung2019-06-121-52/+4
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* | | | | | Fix compile errors when #if 1 for debugEddie Hung2019-06-121-7/+8
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* | | | | | Do not call abc9 if no outputsEddie Hung2019-06-121-54/+65
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* | | | | | More write_xaiger cleanupEddie Hung2019-06-121-1/+1
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* | | | | | ConsistencyEddie Hung2019-06-121-1/+1
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* | | | | | Merge branch 'xc7mux' into xaigEddie Hung2019-06-121-1/+1
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| * | | | | | Typo: wire delay is -W argumentEddie Hung2019-06-121-1/+1
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* | | | | | | Revert "Merge remote-tracking branch 'origin/eddie/shregmap_improve' into ↵Eddie Hung2019-06-121-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xc7mux" This reverts commit a138381ac3f2c820d187f08531ffd823d6cbcfd5, reversing changes made to b77c5da76919f7f99f171a0a2775896fbc8debc2.
* | | | | | | Revert "Merge remote-tracking branch 'origin/eddie/muxpack' into xc7mux"Eddie Hung2019-06-122-267/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit eaee250a6e63e58dfef63fa30c4120db78223e24, reversing changes made to 935df3569b4677ac38041ff01a2f67185681f4e3.
* | | | | | | Revert "Merge remote-tracking branch 'origin/eddie/muxpack' into xc7mux"Eddie Hung2019-06-121-14/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 2223ca91b0cc559bb876e8e97372a8f77da1603e, reversing changes made to eaee250a6e63e58dfef63fa30c4120db78223e24.
* | | | | | | Retry "Add "-W' wire delay arg to abc9, use from synth_xilinx"Eddie Hung2019-06-121-5/+13
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* | | | | | | Revert "Add "-W' wire delay arg to abc9, use from synth_xilinx"Eddie Hung2019-06-121-13/+5
|/ / / / / / | | | | | | | | | | | | | | | | | | This reverts commit 2dffa4685b830313204f5d04314a14ed6ecac8ec.
* | | | | | Add "-W' wire delay arg to abc9, use from synth_xilinxEddie Hung2019-06-111-5/+13
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* | | | | | Revert "Merge remote-tracking branch 'origin/eddie/shregmap_improve' into ↵Eddie Hung2019-06-111-15/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xc7mux" This reverts commit 5174082208ef9bea22ad1ba62622947375b3e83b, reversing changes made to 54379f9872ba3abdf5328994abcf5abfc7288c6b.
* | | | | | Merge remote-tracking branch 'origin/eddie/shregmap_improve' into xc7muxEddie Hung2019-06-111-10/+15
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| * | | | | Try way that doesn't involve creating a new wireEddie Hung2019-06-111-10/+15
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* | | | | | Merge remote-tracking branch 'origin/eddie/shregmap_improve' into xc7muxEddie Hung2019-06-101-3/+6
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| * | | | | If d_bit already in sigbit_chain_next, create extra wireEddie Hung2019-06-101-3/+6
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| * | | | Allow muxcover costs to be changedEddie Hung2019-06-071-12/+42
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* | | | | Revert "Rename shregmap -tech xilinx -> xilinx_dynamic"Eddie Hung2019-06-101-4/+4
| | | | | | | | | | | | | | | | | | | | This reverts commit 94a5f4e60985fc1e3fea75eec85638fa29874bea.
* | | | | Revert "shregmap -tech xilinx_dynamic to work -params and -enpol"Eddie Hung2019-06-101-26/+6
| | | | | | | | | | | | | | | | | | | | This reverts commit 45d1bdf83ae6d51628e917b66f1b6043c8a3baee.
* | | | | Revert "Refactor to ShregmapTechXilinx7Static"Eddie Hung2019-06-101-86/+46
| | | | | | | | | | | | | | | | | | | | This reverts commit e1e37db86073e545269ff440da77f57135e8b155.
* | | | | Revert "Add -tech xilinx_static"Eddie Hung2019-06-101-13/+2
| | | | | | | | | | | | | | | | | | | | This reverts commit dfe9d95579ab98d7518d40e427af858243de4eb3.
* | | | | Revert "Continue support for ShregmapTechXilinx7Static"Eddie Hung2019-06-101-81/+30
| | | | | | | | | | | | | | | | | | | | This reverts commit 72eda94a66c8c4938a713c9ae49d560e6b33574f.