iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	mul2dsp to create cells that can be interchanged with $mul	Eddie Hung	2019-07-18	1	-1/+7
*	Make consistent	Eddie Hung	2019-07-18	1	-1/+2
*	Fix signed multiplier decomposition	Eddie Hung	2019-07-18	1	-29/+36
*	Working for unsigned	Eddie Hung	2019-07-18	1	-52/+28
*	Cleanup	Eddie Hung	2019-07-18	1	-70/+58
*	mul2dsp: Lower partial products always have unsigned inputs	David Shah	2019-07-18	1	-31/+41
*	Fix mul2dsp signedness	Eddie Hung	2019-07-17	1	-42/+38
*	A_SIGNED == B_SIGNED so flip both	Eddie Hung	2019-07-17	1	-21/+12
*	Add DSP_{A,B}_SIGNEDONLY macro	Eddie Hung	2019-07-16	1	-11/+40
*	Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into xc7dsp	Eddie Hung	2019-07-16	1	-22/+26
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\| *	mul2dsp: Fix edge case where Y_WIDTH is less than B_WIDTH+`DSP_A_MAXWIDTH	David Shah	2019-07-16	1	-18/+22
\| *	mul2dsp: Fix indentation	David Shah	2019-07-16	1	-7/+7
* \|	Do not swap if equals	Eddie Hung	2019-07-15	1	-1/+1
* \|	OUT port to Y in generic DSP	Eddie Hung	2019-07-15	1	-1/+1
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*	Only swap if B_WIDTH > A_WIDTH	Eddie Hung	2019-07-15	1	-1/+1
*	Tidy up	Eddie Hung	2019-07-15	1	-39/+26
*	mul2dsp: Fix typo	David Shah	2019-07-08	1	-1/+1
*	Add mul2dsp multiplier splitting rule and ECP5 mapping	David Shah	2019-07-08	1	-0/+237