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* Disable dist RAM boxes due to comb loopEddie Hung2019-06-111-2/+2
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* Remove #ifndef ABCEddie Hung2019-06-111-4/+0
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* Revert "Revert "Move ff_map back after ABC for shregmap""Eddie Hung2019-06-101-5/+5
| | | | This reverts commit e473e7456545d702c011ee7872956f94a8522865.
* Revert "Rename shregmap -tech xilinx -> xilinx_dynamic"Eddie Hung2019-06-101-2/+2
| | | | This reverts commit 94a5f4e60985fc1e3fea75eec85638fa29874bea.
* Comment out muxpack (currently broken)Eddie Hung2019-06-071-2/+2
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* $__XILINX_MUX_ -> $__XILINX_SHIFTXEddie Hung2019-06-062-11/+11
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* Fix muxcover and its techmappingEddie Hung2019-06-062-3/+3
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* Run muxpack and muxcover in synth_xilinxEddie Hung2019-06-062-1/+18
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* Remove abc_flop attributes for nowEddie Hung2019-06-061-56/+10
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* Update abc attributes on FD*E_1Eddie Hung2019-06-051-6/+26
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* CleanupEddie Hung2019-06-052-17/+0
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* Call shregmap -tech xilinx_staticEddie Hung2019-06-051-1/+1
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* Revert "Move ff_map back after ABC for shregmap"Eddie Hung2019-06-051-4/+4
| | | | This reverts commit 9b9bd4e19f3da363eb3c90ef27ace282716d2e06.
* Rename shregmap -tech xilinx -> xilinx_dynamicEddie Hung2019-06-041-2/+2
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* Add space between -D and _ABCEddie Hung2019-06-041-2/+2
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* Add (* abc_flop_q *) to brams_bb.vEddie Hung2019-06-041-8/+8
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* Fix name clashEddie Hung2019-06-041-11/+11
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* Add mux_map.v for wide muxEddie Hung2019-06-044-30/+82
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* Move ff_map back after ABC for shregmapEddie Hung2019-06-031-4/+4
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* Respect -nocarryEddie Hung2019-06-031-1/+3
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* Fix pmux2shiftx logicEddie Hung2019-06-031-1/+1
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* Merge mistakeEddie Hung2019-06-031-14/+6
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* Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-06-031-1/+5
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| * Remove extra newlineEddie Hung2019-06-031-1/+0
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| * Execute techmap and arith_map simultaneouslyEddie Hung2019-06-031-6/+6
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* | TypoEddie Hung2019-06-031-1/+1
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* | IS_C_INVERTEDEddie Hung2019-06-031-4/+4
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* | Fix `ifndefEddie Hung2019-06-031-1/+1
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* | Add flops as blackboxesEddie Hung2019-05-312-0/+27
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* | Add FD*E_1 -> FD*E techmap rulesEddie Hung2019-05-311-5/+31
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* | Techmap flops before ABC againEddie Hung2019-05-311-4/+4
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* | Merge branch 'xaig' into xc7muxEddie Hung2019-05-311-0/+1
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| * \ Merge remote-tracking branch 'origin/master' into xaigEddie Hung2019-04-226-36/+222
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| * \ \ Merge remote-tracking branch 'origin/master' into xaigEddie Hung2019-04-221-8/+10
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| * \ \ \ Merge remote-tracking branch 'origin/master' into xaigEddie Hung2019-04-202-10/+12
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* | | | | | Remove whitebox attribute from DRAMs for nowEddie Hung2019-05-301-2/+2
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* | | | | | Carry in/out to be the last input/output for chains to be preservedEddie Hung2019-05-302-12/+15
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* | | | | | Some more realistic delays...Eddie Hung2019-05-291-7/+7
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* | | | | | TypoEddie Hung2019-05-281-1/+1
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* | | | | | Make MUXF{7,8} and CARRY4 whiteboxEddie Hung2019-05-271-3/+3
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* | | | | | Re-enable lib_whiteboxEddie Hung2019-05-271-5/+5
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* | | | | | BlackboxesEddie Hung2019-05-262-10/+10
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* | | | | | Muck about with LUT delays some moreEddie Hung2019-05-261-5/+5
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* | | | | | Try new LUT delaysEddie Hung2019-05-241-8/+11
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* | | | | | Transpose CARRY4 delaysEddie Hung2019-05-241-10/+8
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* | | | | | Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-05-231-0/+4
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| * | | | | Add "min bits" and "min wports" to xilinx dram rulesEddie Hung2019-05-231-0/+4
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* | | | | | Add whitebox support to DRAMEddie Hung2019-05-235-24/+26
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* | | | | | shift register inference before muxEddie Hung2019-05-221-3/+3
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* | | | | | Fix/workaround symptom unveiled by #1023Eddie Hung2019-05-211-4/+14
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