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author | Anton Blanchard <anton@ozlabs.org> | 2019-10-16 14:41:56 +1100 |
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committer | tgingold <tgingold@users.noreply.github.com> | 2019-10-16 05:41:56 +0200 |
commit | 96ceed2f296a44ca60fc8cd0f91c35edcc2d7b41 (patch) | |
tree | 34e228b8db3afd45702866a3ae61b59f688ae5a0 /testsuite | |
parent | b758bf4c7a5468dbf75972b767e3053b16768891 (diff) | |
download | ghdl-yosys-plugin-96ceed2f296a44ca60fc8cd0f91c35edcc2d7b41.tar.gz ghdl-yosys-plugin-96ceed2f296a44ca60fc8cd0f91c35edcc2d7b41.tar.bz2 ghdl-yosys-plugin-96ceed2f296a44ca60fc8cd0f91c35edcc2d7b41.zip |
Add Id_Neg support (#63)
* Add Id_Neg support
* Add testcase for Id_Neg
Thanks to Pepijn for the example I based this on.
Diffstat (limited to 'testsuite')
-rwxr-xr-x | testsuite/pr63/testsuite.sh | 9 | ||||
-rw-r--r-- | testsuite/pr63/vector.vhdl | 14 |
2 files changed, 23 insertions, 0 deletions
diff --git a/testsuite/pr63/testsuite.sh b/testsuite/pr63/testsuite.sh new file mode 100755 index 0000000..7be5528 --- /dev/null +++ b/testsuite/pr63/testsuite.sh @@ -0,0 +1,9 @@ +#!/bin/sh + +. ../testenv.sh + +run_yosys -p "ghdl vector.vhdl -e vector; opt; dump -o vector.il" + +grep -q 1111000000000000000000000000000000000000000000000000000000010000 vector.il || exit 1 + +clean diff --git a/testsuite/pr63/vector.vhdl b/testsuite/pr63/vector.vhdl new file mode 100644 index 0000000..568d3f3 --- /dev/null +++ b/testsuite/pr63/vector.vhdl @@ -0,0 +1,14 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +entity vector is + port ( + u : out signed(63 downto 0) + ); +end entity vector; + +architecture synth of vector is +begin + u <= -signed'(x"0ffffffffffffff0"); +end synth; |