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authorTristan Gingold <tgingold@free.fr>2020-03-13 05:32:40 +0100
committerTristan Gingold <tgingold@free.fr>2020-03-13 06:30:32 +0100
commit138516ead7cf495551b7056cc31cc06ed655be8e (patch)
tree22337c28a592719d8827ad5d7c600761e5067421 /testsuite/synth/iassoc01/iassoc12.vhdl
parent3d8e30a1a95738a8078db2fcc5051ca7b3ef0b22 (diff)
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testsuite/synth: add tests for previous commit.
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diff --git a/testsuite/synth/iassoc01/iassoc12.vhdl b/testsuite/synth/iassoc01/iassoc12.vhdl
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+use work.pkg.all;
+
+entity riassoc12 is
+ port (v : natural;
+ res : out nat_rec);
+end riassoc12;
+
+architecture behav of riassoc12 is
+begin
+ res.a <= v + 1;
+ res.b <= v + 2;
+end behav;
+
+entity iassoc12 is
+ port (v : natural;
+ a, b : out natural);
+end iassoc12;
+
+use work.pkg.all;
+
+architecture behav of iassoc12 is
+ component riassoc12 is
+ port (v : natural;
+ res : out nat_rec);
+ end component;
+begin
+ inst : riassoc12
+ port map (v => v, res.a => a, res.b => b);
+end behav;