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authorTristan Gingold <tgingold@free.fr>2019-09-08 08:54:41 +0200
committerTristan Gingold <tgingold@free.fr>2019-09-11 06:37:27 +0200
commit42c6c8b8d96d781dbe9173a647d17b3f25da32c2 (patch)
tree7c7c5e29b6fabd59d16723f190e1337dfa148bb8 /testsuite/synth/mem02/dpram1.vhdl
parent419d542accc0a0bd5f3daa833f202043ce6f480c (diff)
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synth: introduce slice type.
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