aboutsummaryrefslogtreecommitdiffstats
path: root/src/synth/synth-expr.ads
Commit message (Expand)AuthorAgeFilesLines
* synth-expr: compute signess for range array attributes. Fix #1645Tristan Gingold2021-02-121-1/+1
* update license headersumarcor2021-02-051-5/+3
* Synthesis of PSL prev function.Tristan Gingold2020-06-021-1/+6
* synth: revert a previous commit: remove the En parameter.Tristan Gingold2020-05-061-7/+3
* synth: remove Global_Context (cleanup).Tristan Gingold2020-05-041-1/+2
* synth: reduce use of global context.Tristan Gingold2020-05-041-1/+3
* synth: propagate enable condition to expressions. For #1273Tristan Gingold2020-05-011-8/+17
* types: introduce Direction_Type, which replaces Iir_Direction.Tristan Gingold2020-04-201-1/+1
* synth: use memtyp in synth-static_oper. Fix #1181Tristan Gingold2020-04-091-0/+3
* synth: refactoring to store static values in wires.Tristan Gingold2020-04-091-2/+6
* synth: extract synth.objtypes from synth.values.Tristan Gingold2020-04-091-0/+1
* synth: add value_memory and use it to store objects value.Tristan Gingold2020-04-061-8/+4
* synth: more cleanup (and use of valtyp).Tristan Gingold2020-04-021-2/+2
* synth: rework - use valtyp for expressions.Tristan Gingold2020-04-021-5/+6
* synth: use more Dim_Type.Tristan Gingold2020-04-011-1/+1
* synth: preliminary work to export module parameters.Tristan Gingold2020-03-311-5/+0
* synth: improve support of vhdl2008 aggregate targets. Fix #1178Tristan Gingold2020-03-301-3/+0
* synth: improve output of memory initial value.Tristan Gingold2020-03-291-1/+1
* synth-expr: handle any object for array attributes.Tristan Gingold2020-03-261-0/+5
* synth: handle some rotation and shifts. Fix #1077Tristan Gingold2020-01-301-0/+6
* synth: remove wbound field of bound_type.Tristan Gingold2020-01-131-2/+1
* synth: factorize code, move value2logvec to synth-expr.Tristan Gingold2019-11-281-0/+21
* synth: add debug_error.Tristan Gingold2019-11-221-4/+0
* synth: renames Is_Const to Is_Static.Tristan Gingold2019-11-131-1/+1
* synth: use synth.source for setting location.Tristan Gingold2019-10-091-3/+0
* synth: refactoring for memidx1.Tristan Gingold2019-10-021-2/+7
* synth: introduce memidx1Tristan Gingold2019-10-021-1/+2
* synth: improve support of arrays or arrays. Fix #955Tristan Gingold2019-10-011-1/+4
* synth: rework type for expression.Tristan Gingold2019-09-251-1/+6
* synth: preliminary work for subtype conversions on interfaces.Tristan Gingold2019-09-221-3/+6
* synth: fold addition on constant nets.Tristan Gingold2019-09-171-0/+2
* synth: remove get_width from synth-exprTristan Gingold2019-09-121-2/+0
* synth: extract synth-oper from synth-exprTristan Gingold2019-09-121-1/+5
* synth: rework partial assignmentsTristan Gingold2019-08-271-6/+3
* synth: also extract edge in PSL expressions.Tristan Gingold2019-08-131-0/+6
* synth: handle subtype conversions.Tristan Gingold2019-08-051-0/+5
* synth: rework indexed names.Tristan Gingold2019-07-301-1/+9
* synth: add support for memories.Tristan Gingold2019-07-291-2/+2
* synth: preliminary support of dynamic indexing.Tristan Gingold2019-07-281-8/+12
* synth: save and display locations for instances.Tristan Gingold2019-07-251-1/+5
* synth: add concat_array function.Tristan Gingold2019-07-041-0/+8
* synth: add dyn_insert module.Tristan Gingold2019-07-011-1/+1
* synth: add syn_extract for dynamic slices.Tristan Gingold2019-06-281-1/+5
* synth: handle slice assignment.Tristan Gingold2019-06-251-0/+5
* synth: add insert gate.Tristan Gingold2019-06-241-0/+5
* synth: get rid of execution and elaboration.Tristan Gingold2019-06-191-4/+14
* synth-expr: use Node instead of Iir (renaming).Tristan Gingold2019-06-131-2/+2
* synth: add comments and refactoring.Tristan Gingold2019-06-071-0/+1
* vhdl: rename iirs to vhdl.nodesTristan Gingold2019-05-051-1/+1
* synth: improve generation of aggregates.Tristan Gingold2019-04-161-1/+1