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* synth-insts: handle slice name as actual to unboundedTristan Gingold2020-01-131-0/+20
* synth-insts: handle unbounded ports in components.Tristan Gingold2020-01-131-39/+49
* synth: use formal instance to evaluate default value. For #1080Tristan Gingold2020-01-121-1/+4
* synth: consider ports size to create unique instances.Tristan Gingold2020-01-101-49/+86
* synth: simplify support of inertial associations.Tristan Gingold2020-01-091-0/+8
* vhdl: improve support of AMS-vhdl (array and record natures, source quantities)Tristan Gingold2019-12-281-1/+1
* netlists: add remove_output_gates.Tristan Gingold2019-12-051-0/+1
* netlists-memories: rework.Tristan Gingold2019-12-051-1/+1
* synth: create unique instance name. Fix #1007Tristan Gingold2019-12-031-4/+152
* synth-insts: use current prefix for instantiations. Fix #1048Tristan Gingold2019-12-011-1/+2
* netlists: remove port API (make it easier to interface).Tristan Gingold2019-11-281-9/+5
* netlists: remove port_inout.Tristan Gingold2019-11-281-16/+8
* synth: rework the sname API.Tristan Gingold2019-11-281-16/+20
* synth: infrastructure for debugger.Tristan Gingold2019-11-201-0/+5
* synth: elaborate packages body.Tristan Gingold2019-11-171-13/+9
* synth: renames Is_Const to Is_Static.Tristan Gingold2019-11-131-2/+2
* synth-expr: handle static values inTristan Gingold2019-11-131-0/+3
* synth-insts: add support for unbounded ports.Tristan Gingold2019-11-121-4/+51
* synth-insts: add support for individual associations.Tristan Gingold2019-11-121-34/+243
* synth-decls: handle unassigned signal/object. For issue 65Tristan Gingold2019-11-071-0/+2
* synth: handle nested if generate statements.Tristan Gingold2019-11-011-0/+2
* netlists: add code to expand dyn_extract gates (WIP).Tristan Gingold2019-10-271-0/+5
* synth: add more locations.Tristan Gingold2019-10-201-0/+1
* synth: add netlists-memories to extract memories. Still WIP.Tristan Gingold2019-10-171-0/+5
* synth-insts: accept architecture instantiation in synth_dependencies.Tristan Gingold2019-10-151-2/+3
* synth-inst: minor refactoring.Tristan Gingold2019-10-131-3/+2
* synth: rewrite cleanup pass.Tristan Gingold2019-10-101-2/+2
* synth: set name on generate statements.Tristan Gingold2019-10-091-1/+2
* synth: set location on instances.Tristan Gingold2019-10-091-0/+1
* synth: use synth.source for setting location.Tristan Gingold2019-10-091-0/+1
* synth: handle package bodies.Tristan Gingold2019-10-071-1/+21
* synth: preliminary support for user packages.Tristan Gingold2019-10-071-0/+44
* synth: allow unconnected port.Tristan Gingold2019-10-071-5/+7
* synth: handle subtypes in components. Fix #970Tristan Gingold2019-10-061-15/+52
* synth: fix crash for port subtype in component.Tristan Gingold2019-10-061-1/+1
* synth: minimal support for blocks. Fix #965Tristan Gingold2019-10-051-0/+2
* synth: handle string subtype defined by a port. Fix #958Tristan Gingold2019-10-011-4/+5
* synth-insts: refactoring.Tristan Gingold2019-09-301-40/+32
* synth-insts: create net object for input port. FixTristan Gingold2019-09-301-3/+14
* synth: renaming and minor refactoring.Tristan Gingold2019-09-301-10/+12
* synth: minor refactoring.Tristan Gingold2019-09-301-4/+4
* synth: fixes after previous patch.Tristan Gingold2019-09-251-0/+7
* synth: rework type for expression.Tristan Gingold2019-09-251-5/+9
* synth-insts: refactoringTristan Gingold2019-09-211-27/+12
* synth-insts: remove useless function.Tristan Gingold2019-09-211-15/+2
* synth: do not create self-instance on black-boxed modules.Tristan Gingold2019-09-211-5/+4
* synth: add bit0/bit1 in instance.Tristan Gingold2019-09-211-8/+11
* synth: add Get_Build (WIP).Tristan Gingold2019-09-201-4/+5
* synth: add base_instance.Tristan Gingold2019-09-201-5/+6
* synth: rename get/set_module for instances.Tristan Gingold2019-09-201-15/+15
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