| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | vhdl+synth: recognize /= to std_logic_unsigned. | Tristan Gingold | 2019-07-25 | 1 | -0/+8 |
| * | vhdl: recognize more predefined std_logic_unsigned functions. | Tristan Gingold | 2019-06-30 | 1 | -0/+16 |
| * | synth: handle std_logic_unsigned."+" | Tristan Gingold | 2019-06-30 | 1 | -0/+9 |
| * | vhdl: recognize std_logic_unsigned | Tristan Gingold | 2019-06-29 | 1 | -0/+124 |
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index : iCE40/ghdl | |
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