iCE40/ghdl - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	vhdl: recognize rotate functions.	Tristan Gingold	2019-09-22	2	-0/+17
*	synth: handle record subtypes.	Tristan Gingold	2019-09-19	1	-5/+8
*	vhdl: add exit/next flags.	Tristan Gingold	2019-09-18	5	-63/+173
*	vhdl-nodes: add a comment.	Tristan Gingold	2019-09-12	1	-1/+1
*	vhdl-ieee-numeric: recognize shift_right.	Tristan Gingold	2019-09-11	1	-17/+31
*	vhdl: recognize numeric_std shift_left.	Tristan Gingold	2019-09-11	2	-0/+24
*	vhdl: recognize numeric_std mul.	Tristan Gingold	2019-09-07	2	-0/+27
*	vhdl: fix unused warning on protected variable.	Tristan Gingold	2019-09-06	1	-0/+1
*	vhdl: handle P32 in connect_scalar. Fix #918	Tristan Gingold	2019-09-05	1	-1/+2
*	vhdl: do not crash on attribute with a type conversion prefix.	Tristan Gingold	2019-09-04	1	-2/+3
*	vhdl: renames Conditional_Expression to Conditional_Expression_Chain.	Tristan Gingold	2019-09-02	8	-37/+40
*	vhdl synth: recognize more operators (add uns log).	Tristan Gingold	2019-09-02	2	-2/+6
*	vhdl-annotations: ignore conditional variable assignment.	Tristan Gingold	2019-08-30	1	-1/+2
*	vhdl-annotate: handle shared anonymous subtype in interfaces.	Tristan Gingold	2019-08-30	1	-1/+4
*	vhdl: recognize ieee.numeric_std std_match.	Tristan Gingold	2019-08-30	2	-0/+39
*	vhdl: recognize 1164 condition operator, handle in synth.	Tristan Gingold	2019-08-30	2	-5/+17
*	synth: add support for record types.	Tristan Gingold	2019-08-29	1	-0/+4
*	synth: support sequential conditional signal assignment.	Tristan Gingold	2019-08-27	1	-0/+1
*	ignore restrict in simulation (#897)	Pepijn de Vos	2019-08-20	2	-18/+17
*	initial support for reduce and/or (#900)	Pepijn de Vos	2019-08-20	2	-5/+22
*	vhdl psl: fully scan PSL keywords in scanner.	Tristan Gingold	2019-08-20	6	-66/+141
*	vhdl-prints: handle architecture in verification unit hierarchical name.	Tristan Gingold	2019-08-20	1	-0/+7
*	vhdl: handle architecture in verification unit hierarchical name.	Tristan Gingold	2019-08-20	3	-13/+53
*	vhdl-prints: handle verification units.	Tristan Gingold	2019-08-20	1	-318/+354
*	vhdl: handle assume in verification units.	Tristan Gingold	2019-08-20	4	-1/+9
*	synth: handle verification units.	Tristan Gingold	2019-08-20	9	-244/+411
*	vhdl: parse verification unit (WIP).	Tristan Gingold	2019-08-17	14	-348/+530
*	vhdl: declare verification units (WIP).	Tristan Gingold	2019-08-16	11	-280/+549
*	vhdl: recognize PSL units reserved words.	Tristan Gingold	2019-08-16	3	-0/+15
*	add synthesis support for logic operators on numeric types (#893)	Pepijn de Vos	2019-08-15	2	-0/+114
*	vhdl: handle PSL keywords as vhdl08 reserved words; switch to PSL scanner mode.	Tristan Gingold	2019-08-14	1	-0/+9
*	vhdl: add PSL keywords to vhdl08 reserved words.	Tristan Gingold	2019-08-14	7	-78/+98
*	vhdl-nodes_walk: handle iir_kind_psl_default_clock.	Tristan Gingold	2019-08-13	1	-1/+2
*	libghdl: also add synthesis part. For #884	Tristan Gingold	2019-08-13	1	-0/+2
*	libghdl: preliminary work to also support synth.	Tristan Gingold	2019-08-13	2	-4/+9
*	vhdl: improve reprint of inertial association.	Tristan Gingold	2019-08-11	6	-181/+206
*	vhdl-sem: fix minor thinko for sem_insert_anonymous_signal.	Tristan Gingold	2019-08-11	1	-1/+24
*	vhdl: avoid crash on incorrect unit name.	Tristan Gingold	2019-08-10	2	-6/+36
*	vhdl: handle subtype indication (with range) in discrete_range.	Tristan Gingold	2019-08-10	7	-63/+105
*	vhdl: remove unused Get/Set_Choice_Order.	Tristan Gingold	2019-08-09	5	-304/+247
*	vhdl: remove -Whides warnings for processes without a label.	Tristan Gingold	2019-08-08	1	-0/+9
*	vhdl: remove severity from cover, report and severity from assume.	Tristan Gingold	2019-08-08	9	-131/+154
*	vhdl-nodes: gather PSL nodes, regenerate nodes_meta.	Tristan Gingold	2019-08-07	2	-125/+91
*	Add support for PSL assumptions, used in formal verification (#880)	Pepijn de Vos	2019-08-07	23	-141/+293
*	vhdl: allow discrete subtype indication for discrete_range.	Tristan Gingold	2019-08-06	5	-45/+53
*	vhdl: for time resolution, do not consider unit name from textio body.	Tristan Gingold	2019-08-06	2	-10/+38
*	synth: improve support of vhdl08. Fix #882	Tristan Gingold	2019-08-05	1	-1/+9
*	synth: add support for memories.	Tristan Gingold	2019-07-29	1	-0/+2
*	synth: unconstrained arrays.	Tristan Gingold	2019-07-28	1	-0/+3
*	synth: preliminary support of dynamic indexing.	Tristan Gingold	2019-07-28	2	-47/+70