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| author | David Shah <davey1576@gmail.com> | 2018-07-10 11:24:30 +0200 |
|---|---|---|
| committer | David Shah <davey1576@gmail.com> | 2018-07-11 10:42:09 +0200 |
| commit | 29d65bd368fa32f7ea13515902df752d30ec4f39 (patch) | |
| tree | a41a99c13e0574caac0d2df0837cec864ee776a8 /ecp5/synth/ulx3s.v | |
| parent | b397dd80712005e4c71b492e27d6af35e6bdc1e9 (diff) | |
| download | nextpnr-29d65bd368fa32f7ea13515902df752d30ec4f39.tar.gz nextpnr-29d65bd368fa32f7ea13515902df752d30ec4f39.tar.bz2 nextpnr-29d65bd368fa32f7ea13515902df752d30ec4f39.zip | |
ecp5: Working on bitstream gen
Signed-off-by: David Shah <davey1576@gmail.com>
Diffstat (limited to 'ecp5/synth/ulx3s.v')
| -rw-r--r-- | ecp5/synth/ulx3s.v | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/ecp5/synth/ulx3s.v b/ecp5/synth/ulx3s.v new file mode 100644 index 00000000..7f0786f5 --- /dev/null +++ b/ecp5/synth/ulx3s.v @@ -0,0 +1,16 @@ +module top(input a_pin, output led_pin, output gpio0_pin); + + wire a; + wire led; + wire gpio0; + (* BEL="X90/Y65/PIOB" *) (* IO_TYPE="LVCMOS33" *) + TRELLIS_IO #(.DIR("INPUT")) a_buf (.B(a_pin), .O(a)); + (* BEL="X0/Y23/PIOC" *) (* IO_TYPE="LVCMOS33" *) + TRELLIS_IO #(.DIR("OUTPUT")) led_buf (.B(led_pin), .I(led), .T(t)); + (* BEL="X0/Y62/PIOD" *) (* IO_TYPE="LVCMOS33" *) + TRELLIS_IO #(.DIR("OUTPUT")) gpio0_buf (.B(gpio0_pin), .I(gpio0), .T(t)); + assign led = !a; + wire t; + TRELLIS_SLICE #(.MODE("LOGIC"), .LUT0_INITVAL(16'h0000)) gnd (.F0(t)); + TRELLIS_SLICE #(.MODE("LOGIC"), .LUT0_INITVAL(16'hFFFF)) vcc (.F0(gpio0)); +endmodule |