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authorAlessandro Comodi <acomodi@antmicro.com>2021-03-17 18:43:29 +0100
committerAlessandro Comodi <acomodi@antmicro.com>2021-03-23 20:36:23 +0100
commit336d31cbcf592455abdbefc01ec5c6f87914b4f3 (patch)
tree339cbe71a677180a466fbab7a6718fd449d6f759 /fpga_interchange/examples/tests/wire/wire_arty.xdc
parent3cc50a5744beeae63ffb9ecd2064666e90d26be4 (diff)
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fpga_interchange: add more devices
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
Diffstat (limited to 'fpga_interchange/examples/tests/wire/wire_arty.xdc')
-rw-r--r--fpga_interchange/examples/tests/wire/wire_arty.xdc4
1 files changed, 2 insertions, 2 deletions
diff --git a/fpga_interchange/examples/tests/wire/wire_arty.xdc b/fpga_interchange/examples/tests/wire/wire_arty.xdc
index c923f0fc..54c661c9 100644
--- a/fpga_interchange/examples/tests/wire/wire_arty.xdc
+++ b/fpga_interchange/examples/tests/wire/wire_arty.xdc
@@ -1,5 +1,5 @@
-set_property PACKAGE_PIN N16 [get_ports i]
-set_property PACKAGE_PIN N15 [get_ports o]
+set_property PACKAGE_PIN A8 [get_ports i]
+set_property PACKAGE_PIN H5 [get_ports o]
set_property IOSTANDARD LVCMOS33 [get_ports i]
set_property IOSTANDARD LVCMOS33 [get_ports o]