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| author | David Shah <davey1576@gmail.com> | 2018-06-10 11:14:50 +0200 |
|---|---|---|
| committer | David Shah <davey1576@gmail.com> | 2018-06-10 11:14:50 +0200 |
| commit | 89d5280bf6cfa0a5f35ce674c456a14e68372908 (patch) | |
| tree | 05e851aeb07943568f7754d96a149fdcf3d551db /ice40/chip.h | |
| parent | 48b72126c9f8f01bb22ab45f1bf0cc7c9ffb2c83 (diff) | |
| download | nextpnr-89d5280bf6cfa0a5f35ce674c456a14e68372908.tar.gz nextpnr-89d5280bf6cfa0a5f35ce674c456a14e68372908.tar.bz2 nextpnr-89d5280bf6cfa0a5f35ce674c456a14e68372908.zip | |
ice40: Adding non-routing config bits to database
Signed-off-by: David Shah <davey1576@gmail.com>
Diffstat (limited to 'ice40/chip.h')
| -rw-r--r-- | ice40/chip.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/ice40/chip.h b/ice40/chip.h index 97421e48..1e80cc47 100644 --- a/ice40/chip.h +++ b/ice40/chip.h @@ -109,11 +109,11 @@ struct WireInfoPOD enum TileType { - TILE_NONE, - TILE_LOGIC, - TILE_IO, - TILE_RAMB, - TILE_RAMT, + TILE_NONE = 0, + TILE_LOGIC = 1, + TILE_IO = 2, + TILE_RAMB = 3, + TILE_RAMT = 4, }; struct ConfigBitPOD @@ -128,9 +128,9 @@ struct ConfigEntryPOD ConfigBitPOD *bits; }; -struct TileBitsPOD +struct TileInfoPOD { - int8_t width, height; + int8_t cols, rows; int num_config_entries; ConfigEntryPOD *entries; }; @@ -147,7 +147,7 @@ struct SwitchInfoPOD struct BitstreamInfoPOD { int num_switches; - TileBitsPOD *tiles_nonrouting; + TileInfoPOD *tiles_nonrouting; SwitchInfoPOD *switches; }; |