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Age
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*
Add same fix as in issue #373
Miodrag Milanovic
2021-04-08
1
-0
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+4
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Merge pull request #665 from cr1901/optional-lto
gatecat
2021-04-07
1
-2
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+13
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Add CMake option to enable IPO (enabled by default).
William D. Jones
2021-04-07
1
-2
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+13
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Merge pull request #659 from litghost/pseudo_pip_fixes
gatecat
2021-04-06
11
-66
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+882
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[interchange] Provide estimateDelay when USE_LOOKAHEAD is not defined.
Keith Rothman
2021-04-06
1
-1
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+16
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Don't fail-fast for GH actions to allow for easier CI debugging.
Keith Rothman
2021-04-06
1
-0
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+3
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[interchange] Remove requirement to have wire_lut.
Keith Rothman
2021-04-06
3
-6
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+7
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[interchange] Fix invalid use of local variables due to refactoring.
Keith Rothman
2021-04-06
3
-6
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+7
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[interchange] Prevent site router from generating incorrect LUTs.
Keith Rothman
2021-04-06
3
-42
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+102
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[interchange] Scale edge cost of pseudo pips.
Keith Rothman
2021-04-06
2
-5
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+12
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[interchange] Fix missing inline methods in site_arch.impl.h
Keith Rothman
2021-04-06
2
-8
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+9
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[interchange] Disallow site edges during general routing.
Keith Rothman
2021-04-06
2
-5
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+23
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[interchange] Add crude pseudo pip model.
Keith Rothman
2021-04-06
6
-7
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+717
*
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Merge pull request #663 from litghost/fix_router2_without_bb
gatecat
2021-04-06
1
-1
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+13
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Fix bug in router2 where router may give up too early.
Keith Rothman
2021-04-06
1
-1
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+13
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Merge pull request #661 from litghost/document_site_router
gatecat
2021-04-06
1
-10
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+58
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[interchange] Add some documentation for the site router.
Keith Rothman
2021-04-05
1
-10
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+58
*
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Merge pull request #662 from litghost/fix_cirrus_ci
gatecat
2021-04-06
1
-1
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+1
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Increase vCPU to 5 because of cirrus resource limit change.
Keith Rothman
2021-04-05
1
-1
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+1
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*
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Merge pull request #657 from acomodi/interchange-counter-multi-board
gatecat
2021-04-06
5
-23
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+25
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interchange: counter: testing on multiple boards
Alessandro Comodi
2021-04-01
5
-23
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+25
*
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Merge pull request #658 from litghost/increment_chipdb
gatecat
2021-04-02
5
-5
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+14
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[interchange] Update interchange CI for new chipdb change.
Keith Rothman
2021-04-01
2
-3
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+2
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[interchange] Update to v6 of FPGA interchange chipdb.
Keith Rothman
2021-04-01
3
-2
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+12
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*
Merge pull request #646 from YosysHQ/gatecat/nexus-cmake
gatecat
2021-03-31
15
-133
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+385
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interchange: Fix nexus cmake review comments
gatecat
2021-03-31
4
-16
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+11
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ci: Build prjoxide only for LIFCL
gatecat
2021-03-30
2
-7
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+8
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interchange: Split xc7 and nexus chipdb cmake
gatecat
2021-03-30
3
-243
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+245
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interchange: Add Nexus LUT test
gatecat
2021-03-30
8
-20
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+140
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interchange: Add Nexus to CI
gatecat
2021-03-30
5
-2
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+21
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interchange: Add CMake support for Nexus/prjoxide
gatecat
2021-03-30
3
-0
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+115
*
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Merge pull request #656 from litghost/fix_dedicated_interconnect_bug
gatecat
2021-03-30
2
-10
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+23
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Fix bug where DedicateInterconnect incorrectly allows some placement.
Keith Rothman
2021-03-30
2
-10
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+23
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*
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Merge pull request #653 from litghost/fix_site_pip_check
gatecat
2021-03-30
1
-7
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+22
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[interchange] Fix site pip check for drivers.
Keith Rothman
2021-03-30
1
-7
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+22
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*
Merge pull request #655 from YosysHQ/gatecat/alt-placer-fix
gatecat
2021-03-30
2
-7
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+8
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interchange: Fix illegal placements
gatecat
2021-03-30
2
-7
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+8
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nexus: Fix some IO FASM gen
gatecat
2021-03-30
1
-0
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+4
*
nexus: Fix LIFCL-17 LRAM FASM
gatecat
2021-03-30
1
-0
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+2
*
nexus: Fix default IO config
gatecat
2021-03-29
1
-0
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+2
*
Merge pull request #651 from YosysHQ/gatecat/nexus-vcco
gatecat
2021-03-29
1
-3
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+51
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nexus: Fix bank Vcco FASM
gatecat
2021-03-29
1
-3
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+51
*
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nexus: Default HF_OSC_EN to ENABLED
gatecat
2021-03-29
1
-1
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+1
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Merge pull request #645 from litghost/add_counter_and_ram
gatecat
2021-03-29
23
-337
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+1221
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Update README with latest develpment progress.
Keith Rothman
2021-03-25
2
-146
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+39
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interchange: Fix bug in site router where a bad solution isn't remove.
Keith Rothman
2021-03-25
1
-3
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+7
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Implement debugging tools for site router.
Keith Rothman
2021-03-25
7
-23
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+166
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Add some FIXME's around VCC assumption in LUT logic.
Keith Rothman
2021-03-25
1
-0
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+17
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Add targets to generate YAML outputs for DeviceResource files.
Keith Rothman
2021-03-25
1
-0
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+22
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Re-work LUT mapping logic to only put VCC pins when required.
Keith Rothman
2021-03-25
5
-104
/
+174
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