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* bump fpga_interchange_schemaAlessandro Comodi2021-03-161-0/+0
| | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
* fpga_intrchange: add cmake infrastructure to generate chipdbsAlessandro Comodi2021-03-166-133/+122
| | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
* Merge pull request #626 from YosysHQ/missing-includesgatecat2021-03-162-0/+5
|\ | | | | Add missing includes to fix WASI build
| * Add missing includes to fix WASI build.whitequark2021-03-162-0/+5
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* Merge pull request #625 from litghost/use_namespace_macrogatecat2021-03-1514-28/+34
|\ | | | | Use NEXTPNR_NAMESPACE macro's now that headers are seperated.
| * Use NEXTPNR_NAMESPACE macro's now that headers are seperated.Keith Rothman2021-03-1514-28/+34
|/ | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Merge pull request #621 from litghost/fix_header_nightmaregatecat2021-03-1549-2467/+3267
|\ | | | | Split nextpnr.h to allow for linear inclusion.
| * Split nextpnr.h to allow for linear inclusion.Keith Rothman2021-03-1549-2467/+3267
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "nextpnr.h" is no longer the god header. Important improvements: - Functions in log.h can be used without including BaseCtx/Arch/Context. This means that log_X functions can be called without included "nextpnr.h" - NPNR_ASSERT can be used without including "nextpnr.h" by including "nextpnr_assertions.h". This allows NPNR_ASSERT to be used safely in any header file. - Types defined in "archdefs.h" are now available without including BaseCtx/Arch/Context. This means that utility classes that will be used inside of BaseCtx/Arch/Context can be defined safely in a self-contained header. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* | Merge pull request #624 from YosysHQ/gatecat/fix-623gatecat2021-03-151-0/+2
|\ \ | |/ |/| opt-timing: Skip undriven nets
| * opt-timing: Skip undriven netsgatecat2021-03-151-0/+2
|/ | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Merge pull request #620 from litghost/handle_partial_routedgatecat2021-03-122-28/+54
|\ | | | | Add support for partially routed nets from the placer in router2.
| * Add support for partially routed nets from the placer in router2.Keith Rothman2021-03-122-28/+54
|/ | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Merge pull request #618 from YosysHQ/no-absl-on-wasigatecat2021-03-121-1/+3
|\ | | | | Don't include Abseil if it is not used
| * CMake: Don't include Abseil if it is not used.whitequark2021-03-121-1/+3
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* Merge pull request #615 from litghost/add_lookahead_diag_to_router2gatecat2021-03-101-13/+41
|\ | | | | Add diagnostic prints to debug lookahead performance.
| * Add diagnostic prints to debug lookahead performance.Keith Rothman2021-03-101-13/+41
|/ | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Merge pull request #617 from YosysHQ/no-absl-on-wasigatecat2021-03-102-2/+10
|\ | | | | Only depend on Abseil in threaded builds.
| * Only depend on Abseil in threaded builds.whitequark2021-03-102-2/+10
|/ | | | | | Abseil has a hard dependency on threads (not just in the build system but in many places in the base libraries), so there is no way to use it on WASI at the moment.
* Merge pull request #607 from litghost/add_absl_flat_hash_mapgatecat2021-03-094-1/+10
|\ | | | | Add absl::flat_hash_map.
| * Add absl::flat_hash_map.Keith Rothman2021-03-014-1/+10
| | | | | | | | | | | | | | This lowers the CPU cost of using the flat wire map in router2, and should use less memory as well. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* | Merge pull request #609 from YosysHQ/gatecat/sta-v2gatecat2021-03-0910-254/+943
|\ \ | | | | | | Use new timing engine for criticality
| * | timing: Integration tweaksgatecat2021-03-054-4/+9
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
| * | timing: Skip route delays for unplaced/nullptr cellsgatecat2021-03-041-1/+6
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
| * | timing: Replace all users of criticality with new enginegatecat2021-03-046-241/+58
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
| * | timing: Use new engine in SA except for budget-based modegatecat2021-03-041-10/+7
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
| * | timing: Use new engine for HeAPgatecat2021-03-043-14/+19
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
| * | timing: Add support for critical path printinggatecat2021-03-042-0/+69
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
| * | timing: Slack and criticality computationgatecat2021-03-042-0/+47
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
| * | timing: Produce plausible Fmax figuregatecat2021-03-042-1/+12
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
| * | timing: Add Fmax printing for debugginggatecat2021-03-042-0/+23
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
| * | timing: Add backwards path walkinggatecat2021-03-043-1/+71
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
| * | timing: Add forward path walkinggatecat2021-03-042-0/+105
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
| * | timing: Compute domain pairsgatecat2021-03-042-13/+59
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
| * | timing: Add port-domain trackinggatecat2021-03-043-1/+115
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
| * | timing: Add topological sort from Yosysgatecat2021-03-043-0/+130
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
| * | timing: Import cell delays to our own structuresgatecat2021-03-042-0/+123
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
| * | timing: Data structures for STA rewritegatecat2021-03-041-0/+122
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | | Merge pull request #613 from YosysHQ/gatecat/nexus-dphygatecat2021-03-086-2/+121
|\ \ \ | | | | | | | | Add basic support for Nexus DPHY hard IP
| * | | nexus: Support for hard DPHYgatecat2021-03-084-2/+73
| | | | | | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
| * | | nexus: Add pin definitions for DPHYgatecat2021-03-083-0/+48
|/ / / | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | | Merge pull request #612 from YosysHQ/gatecat/router2-bb-fixgatecat2021-03-081-1/+1
|\ \ \ | | | | | | | | router2: Fix vast perf drop when leaving bounding box
| * | | router2: Fix vast perf drop when leaving bounding boxgatecat2021-03-081-1/+1
|/ / / | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | | nexus: Fix copypastagatecat2021-03-081-1/+1
| | | | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | | nexus: Fail gracefully when seeing special pinsgatecat2021-03-051-1/+1
|/ / | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | Merge pull request #608 from YosysHQ/gatecat/lifcl-17gatecat2021-03-031-1/+1
|\ \ | | | | | | Fix global normalisation for LIFCL-17
| * | nexus: Fix global handling for LIFCL-17gatecat2021-03-031-1/+1
|/ / | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | clangformatgatecat2021-03-033-114/+108
| | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | Merge pull request #604 from litghost/add_counter_testgatecat2021-03-0314-19/+820
|\ \ | | | | | | Add counter test for FPGA interchange
| * | Update FPGA interchange README.Keith Rothman2021-02-261-11/+7
| | | | | | | | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
| * | For now just return false in the site router.Keith Rothman2021-02-261-1/+1
| | | | | | | | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>