iCE40/nextpnr - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
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\| * \|	timing: Use new engine for HeAP	gatecat	2021-03-04	3	-14/+19
\| * \|	timing: Add support for critical path printing	gatecat	2021-03-04	2	-0/+69
\| * \|	timing: Slack and criticality computation	gatecat	2021-03-04	2	-0/+47
\| * \|	timing: Produce plausible Fmax figure	gatecat	2021-03-04	2	-1/+12
\| * \|	timing: Add Fmax printing for debugging	gatecat	2021-03-04	2	-0/+23
\| * \|	timing: Add backwards path walking	gatecat	2021-03-04	3	-1/+71
\| * \|	timing: Add forward path walking	gatecat	2021-03-04	2	-0/+105
\| * \|	timing: Compute domain pairs	gatecat	2021-03-04	2	-13/+59
\| * \|	timing: Add port-domain tracking	gatecat	2021-03-04	3	-1/+115
\| * \|	timing: Add topological sort from Yosys	gatecat	2021-03-04	3	-0/+130
\| * \|	timing: Import cell delays to our own structures	gatecat	2021-03-04	2	-0/+123
\| * \|	timing: Data structures for STA rewrite	gatecat	2021-03-04	1	-0/+122
* \| \|	Merge pull request #613 from YosysHQ/gatecat/nexus-dphy	gatecat	2021-03-08	6	-2/+121
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\| * \| \|	nexus: Support for hard DPHY	gatecat	2021-03-08	4	-2/+73
\| * \| \|	nexus: Add pin definitions for DPHY	gatecat	2021-03-08	3	-0/+48
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* \| \|	Merge pull request #612 from YosysHQ/gatecat/router2-bb-fix	gatecat	2021-03-08	1	-1/+1
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\| * \| \|	router2: Fix vast perf drop when leaving bounding box	gatecat	2021-03-08	1	-1/+1
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* \| \|	nexus: Fix copypasta	gatecat	2021-03-08	1	-1/+1
* \| \|	nexus: Fail gracefully when seeing special pins	gatecat	2021-03-05	1	-1/+1
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* \|	Merge pull request #608 from YosysHQ/gatecat/lifcl-17	gatecat	2021-03-03	1	-1/+1
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\| * \|	nexus: Fix global handling for LIFCL-17	gatecat	2021-03-03	1	-1/+1
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* \|	clangformat	gatecat	2021-03-03	3	-114/+108
* \|	Merge pull request #604 from litghost/add_counter_test	gatecat	2021-03-03	14	-19/+820
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\| * \|	Update FPGA interchange README.	Keith Rothman	2021-02-26	1	-11/+7
\| * \|	For now just return false in the site router.	Keith Rothman	2021-02-26	1	-1/+1
\| * \|	Initial LUT rotation logic.	Keith Rothman	2021-02-26	8	-7/+741
\| * \|	Add counter test.	Keith Rothman	2021-02-26	5	-0/+71
* \| \|	Merge pull request #605 from litghost/add_placement_sanity_check	gatecat	2021-03-02	5	-11/+106
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\| * \|	Correct spelling of RAII and add missing check in unlock_early.	Keith Rothman	2021-03-01	1	-10/+19
\| * \|	Use scope in router1/2 and placer1.	Keith Rothman	2021-03-01	4	-10/+18
\| * \|	Fix latent bug with context locking in placer HeAP.	Keith Rothman	2021-02-26	2	-10/+68
\| * \|	Add placement sanity check in placer_heap.	Keith Rothman	2021-02-26	1	-1/+21
* \| \|	Merge pull request #606 from pepijndevos/gowin_fixes	gatecat	2021-02-28	2	-1/+9
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\| * \| \|	only one type of dff per slice	Pepijn de Vos	2021-02-28	2	-1/+9
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* \| \|	Merge pull request #603 from litghost/fix_trival_bad_swap	gatecat	2021-02-26	1	-0/+12
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\| *	Prevent trival misplacements in placer1.	Keith Rothman	2021-02-26	1	-0/+12
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*	Merge pull request #602 from YosysHQ/gatecat/remove-unused-constr	gatecat	2021-02-26	2	-187/+0
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\| *	Remove unused advanced timing constraint API	gatecat	2021-02-26	2	-187/+0
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*	Merge pull request #599 from litghost/allow_router2_to_use_preroutes	gatecat	2021-02-26	1	-4/+54
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\| *	Allow router2 to use routed but not fixed arcs.	Keith Rothman	2021-02-25	1	-4/+54
* \|	Merge pull request #601 from YosysHQ/no-default-Werror	gatecat	2021-02-26	1	-1/+1
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\| *	cmake: Don't enable any -Werror flags without opt-in.	whitequark	2021-02-26	1	-1/+1
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*	Merge pull request #598 from YosysHQ/gatecat/compiler-flags	gatecat	2021-02-25	20	-62/+54
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\| *	Fix compiler warnings introduced by -Wextra	gatecat	2021-02-25	19	-59/+46
\| *	cmake: Enable -Wextra, and -Werror in some cases	gatecat	2021-02-25	2	-4/+9
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*	Merge pull request #591 from litghost/add_constant_network	gatecat	2021-02-25	26	-121/+1853
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\| *	Fix assorted bugs in FPGA interchange.	Keith Rothman	2021-02-23	8	-422/+626
\| *	Finish dedicated interconnect implementation.	Keith Rothman	2021-02-23	3	-139/+611
\| *	Working FF example now that constant merging is done.	Keith Rothman	2021-02-23	6	-8/+218
\| *	Add initial logic for handling dedicated interconnect situations.	Keith Rothman	2021-02-23	11	-26/+587