Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Add opetion to defie ICEBOX_ROOT, fix compile on other location | Miodrag Milanovic | 2018-07-03 | 1 | -1/+2 |
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* | Make chibdb.py able to generate pure binary output | Miodrag Milanovic | 2018-07-03 | 1 | -5/+27 |
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* | Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr | David Shah | 2018-06-22 | 1 | -1/+1 |
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| * | Merge branch 'q3k/gl' into 'master' | Serge Bazanski | 2018-06-22 | 1 | -1/+1 |
| |\ | | | | | | | | | | | | | Modern OpenGL renderer See merge request SymbioticEDA/nextpnr!1 | ||||
| | * | Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into q3k/gl | Sergiusz Bazanski | 2018-06-22 | 1 | -4/+66 |
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| | * | | chipdb.py style fix | Sergiusz Bazanski | 2018-06-20 | 1 | -1/+1 |
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* | | | | ice40: Adding extra cell wires to database; SB_WARMBOOT working | David Shah | 2018-06-22 | 1 | -0/+47 |
|/ / / | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
* | / | ice40: Preparations for extra cells support | David Shah | 2018-06-22 | 1 | -0/+12 |
| |/ |/| | | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
* | | ice40: Add UltraPlus tiles to database | David Shah | 2018-06-22 | 1 | -4/+66 |
|/ | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
* | Improve --tmfuzz mode and iCE40 delay estimator | Clifford Wolf | 2018-06-20 | 1 | -4/+4 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Fix chipdb UltraPlus wires | David Shah | 2018-06-20 | 1 | -1/+1 |
| | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
* | Add better iCE40 delay estimates | Clifford Wolf | 2018-06-20 | 1 | -5/+113 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Refactore ice40 chipdb to use a super-large C-string as output format | Clifford Wolf | 2018-06-17 | 1 | -18/+76 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Minor chipdb.py improvement | Clifford Wolf | 2018-06-17 | 1 | -2/+17 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Move top-level ChipInfoPOD into ice40 chipdb blob | Clifford Wolf | 2018-06-17 | 1 | -19/+32 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Move PackageInfoPOD to ice40 chipdb blob | Clifford Wolf | 2018-06-17 | 1 | -6/+8 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Move TileType array to ice40 chipdb blob | Clifford Wolf | 2018-06-17 | 1 | -6/+13 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Move BitstreamInfoPOD to ice40 chipdb blob | Clifford Wolf | 2018-06-17 | 1 | -8/+14 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Move IerenInfoPOD to ice40 chipdb blob | Clifford Wolf | 2018-06-17 | 1 | -12/+11 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Move TileInfoPOD to chipdb blob | Clifford Wolf | 2018-06-17 | 1 | -6/+14 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Move SwitchInfoPOD to chipdb blob | Clifford Wolf | 2018-06-17 | 1 | -14/+24 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Move PipInfoPOD into ChipDB binary blob | Clifford Wolf | 2018-06-17 | 1 | -6/+28 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Move WireInfoPOD into ChipDB binary blob | Clifford Wolf | 2018-06-17 | 1 | -26/+48 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Minor refactoring of BinaryBlobAssembler, fix alignments | Clifford Wolf | 2018-06-17 | 1 | -67/+123 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Progress with chipdb refactoring | Clifford Wolf | 2018-06-16 | 1 | -10/+22 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Progress with chipdb refactoring | Clifford Wolf | 2018-06-16 | 1 | -39/+34 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Progress with chipdb refactoring | Clifford Wolf | 2018-06-16 | 1 | -9/+150 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Some refactoring of Chip API (prep for chipdb refactoring) | Clifford Wolf | 2018-06-16 | 1 | -1/+1 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Drastically reduce number of linker symbols in chipdb | Clifford Wolf | 2018-06-13 | 1 | -18/+40 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add missing iCE40 global buffer bels | Clifford Wolf | 2018-06-13 | 1 | -0/+18 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add hierarchy to bel/wire/pip names | Clifford Wolf | 2018-06-13 | 1 | -6/+6 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | ice40: Update examples to use packer/pcf | David Shah | 2018-06-13 | 1 | -2/+3 |
| | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
* | ice40: Add package pins to database | David Shah | 2018-06-13 | 1 | -2/+36 |
| | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
* | Add nextpnr namespace | Clifford Wolf | 2018-06-12 | 1 | -1/+8 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add "nextpnr.h" | Clifford Wolf | 2018-06-11 | 1 | -1/+1 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Improving 5k support | David Shah | 2018-06-10 | 1 | -2/+11 |
| | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
* | Fix iCE40 routing graph | Clifford Wolf | 2018-06-10 | 1 | -22/+1 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add support for iCE40 global buffers (currently only for 1k devices) | Clifford Wolf | 2018-06-10 | 1 | -0/+20 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Debugging on icebreaker | David Shah | 2018-06-10 | 1 | -2/+2 |
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* | Fix ice40 pip/switch locked performance issue | Clifford Wolf | 2018-06-10 | 1 | -1/+1 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | ice40: Add IO config to bitstream | David Shah | 2018-06-10 | 1 | -2/+17 |
| | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
* | ice40: Adding non-routing config bits to database | David Shah | 2018-06-10 | 1 | -2/+55 |
| | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
* | ice40: Add switch data to database | David Shah | 2018-06-10 | 1 | -6/+47 |
| | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
* | Renamed LOC attribute to BEL, fix ice40 IO bel names | Clifford Wolf | 2018-06-09 | 1 | -1/+1 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Getting rid of .nil() methods, compare with zero- and default-constructed ↵ | Clifford Wolf | 2018-06-09 | 1 | -1/+1 |
| | | | | | | objects instead Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add very basic router | Clifford Wolf | 2018-06-09 | 1 | -6/+28 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add ice40 geometry information | Clifford Wolf | 2018-06-06 | 1 | -8/+31 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Refactor Chip API and iCE40 database | Clifford Wolf | 2018-06-06 | 1 | -35/+54 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add iCE40 blockram bels | Clifford Wolf | 2018-06-04 | 1 | -0/+31 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add iCE40 SB_IO bels | Clifford Wolf | 2018-06-03 | 1 | -0/+31 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> |