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* Refactor and cope with new abc_flop formatEddie Hung2019-07-011-9/+21
* Fix spacingEddie Hung2019-07-011-1/+1
* Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-07-019-77/+189
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| * Replace log_assert() with meaningful log_error()Eddie Hung2019-06-281-1/+5
| * Refactor for one "abc_carry" attribute on moduleEddie Hung2019-06-271-31/+37
| * Remove unneeded includeEddie Hung2019-06-271-3/+0
| * Merge origin/masterEddie Hung2019-06-271-1/+1
| * Merge remote-tracking branch 'origin/master' into xaigEddie Hung2019-06-241-0/+12
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| | * Add upto and offset to JSON portsMiodrag Milanovic2019-06-211-0/+12
| * | Merge remote-tracking branch 'origin/master' into xaigEddie Hung2019-06-213-6/+19
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| | * Fix typoMiodrag Milanovic2019-06-211-1/+1
| | * Added JSON upto and offsetClifford Wolf2019-06-211-0/+12
| | * Merge pull request #1119 from YosysHQ/eddie/fix1118Clifford Wolf2019-06-211-0/+1
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| | | * Make genvar a signed typeEddie Hung2019-06-201-0/+1
| | * | Maintain "is_unsized" state of constantsEddie Hung2019-06-201-6/+6
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| * | Reduce log_debug spam in parse_xaiger()Eddie Hung2019-06-211-16/+19
| * | Workaround issues exposed by gcc-4.8Eddie Hung2019-06-211-0/+7
| * | Fix broken abc9.v test due to inout being 1'bxEddie Hung2019-06-201-3/+10
| * | Merge remote-tracking branch 'origin/master' into xaigEddie Hung2019-06-206-15/+77
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| | * Merge branch 'unpacked_arrays' of https://github.com/towoe/yosys-sv into towo...Clifford Wolf2019-06-201-1/+7
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| | | * Unpacked array declaration using sizeTobias Wölfel2019-06-191-1/+7
| | * | Add "read_verilog -pwires" feature, closes #1106Clifford Wolf2019-06-195-9/+44
| | * | Add defaultvalue attributeClifford Wolf2019-06-191-0/+11
| | * | Fix handling of "logic" variables with initial valueClifford Wolf2019-06-191-2/+2
| | * | Fixed brojen $error()/$info/$warning() on non-generate blocksUdi Finkelstein2019-06-112-3/+13
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| * | Fix issue with part of PI being 1'bxEddie Hung2019-06-201-4/+6
| * | CleanupEddie Hung2019-06-161-20/+1
* | | CleanupEddie Hung2019-06-161-23/+18
* | | Read init from outputsEddie Hung2019-06-151-0/+4
* | | Fix debug messageEddie Hung2019-06-151-0/+1
* | | Fix log_debug messagesEddie Hung2019-06-151-17/+23
* | | Missing close bracketEddie Hung2019-06-151-1/+1
* | | read_aiger to not require clk_name for latches, plus debugEddie Hung2019-06-151-21/+37
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* | Cover __APPLE__ too for little to big endianEddie Hung2019-06-141-4/+7
* | Further cleanup based on @daveshah1Eddie Hung2019-06-141-10/+20
* | Resolve comments from @daveshah1Eddie Hung2019-06-141-2/+2
* | CleanupEddie Hung2019-06-141-7/+3
* | Add TODO to parse_xaigerEddie Hung2019-06-141-0/+1
* | Optimise some moreEddie Hung2019-06-131-58/+53
* | Move ConstEvalAig to aigerparse.ccEddie Hung2019-06-131-3/+161
* | Add ConstEvalAig specialised for AIGsEddie Hung2019-06-131-3/+2
* | parse_xaiger to cope with inoutsEddie Hung2019-06-121-6/+0
* | ConsistencyEddie Hung2019-06-122-2/+2
* | Merge remote-tracking branch 'origin/master' into xaigEddie Hung2019-06-1216-957/+1462
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| * Fix spacing from spaces to tabsEddie Hung2019-06-071-362/+362
| * Fix spacing (entire file is wrong anyway, will fix later)Eddie Hung2019-06-071-3/+3
| * Remove unnecessary std::getline() for ASCIIEddie Hung2019-06-071-3/+0
| * Fix read_aiger -- create zero driver, fix init width, parse 'b'Eddie Hung2019-06-072-13/+52
| * Fixes and cleanups in AST_TECALL handlingClifford Wolf2019-06-073-46/+34
| * Merge branch 'pr_elab_sys_tasks' of https://github.com/udif/yosys into cliffo...Clifford Wolf2019-06-076-5/+64
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