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* Add abc9.dff scratchpad optionEddie Hung2020-01-061-0/+1
* Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2020-01-061-36/+67
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| * inherit default values when checking scratchpad for argumentsN. Engelhardt2020-01-061-27/+10
| * share codepath for scratchpad argument handling with command argumentsN. Engelhardt2020-01-031-40/+84
| * Merge branch 'master' of https://github.com/YosysHQ/yosys into abc_scratchpad...N. Engelhardt2020-01-031-19/+18
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| * | check scratchpad variable abc9.scriptfileN. Engelhardt2019-12-171-0/+2
| * | check scratchpad variables for custom abc scriptsN. Engelhardt2019-12-131-0/+2
* | | Update docEddie Hung2020-01-021-4/+4
* | | abc9 -keepff -> -dff; refactor dff operationsEddie Hung2020-01-021-19/+30
* | | Cleanup abc9, update doc for -keepff optionEddie Hung2020-01-011-6/+5
* | | Restore abc9 -keepffEddie Hung2020-01-011-39/+40
* | | attributes.count() -> get_bool_attribute()Eddie Hung2020-01-011-2/+2
* | | parse_xaiger to not take box_lookupEddie Hung2019-12-311-43/+4
* | | Do not re-order carry chain ports, just precompute iteration orderEddie Hung2019-12-311-22/+0
* | | Remove delay targets docEddie Hung2019-12-301-9/+0
* | | write_xaiger to use scratchpad for stats; cleanup abc9Eddie Hung2019-12-301-173/+15
* | | Add "synth_xilinx -dff" option, cleanup abc9Eddie Hung2019-12-301-49/+19
* | | Disable clock domain partitioning in Yosys pass, let ABC do itEddie Hung2019-12-231-6/+22
* | | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-12-201-19/+18
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| * | Interpret "abc9 -lut" as lut string only if [0-9:]Eddie Hung2019-12-181-19/+18
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* | Split into $__ABC9_ASYNC[01], do not add cell->type to clkdomain_tEddie Hung2019-12-191-5/+5
* | Remove &verify -sEddie Hung2019-12-171-1/+1
* | Use pool<> instead of std::set<> to preserver orderingEddie Hung2019-12-171-6/+6
* | Put $__ABC9_{FF_,ASYNC} into same clock domain as abc9_flopEddie Hung2019-12-161-5/+27
* | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-12-061-29/+40
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| * abc9: Fix breaking of SCCsDavid Shah2019-12-011-29/+40
| * Merge branch 'master' into eddie/abc_to_abc9Eddie Hung2019-10-041-3/+12
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* | | Call abc9 with "&write -n", and parse_xaiger() to copeEddie Hung2019-12-061-2/+2
* | | Fix abc9 re-integration, remove abc9_control_wire, use cell->type asEddie Hung2019-12-061-39/+15
* | | abc9 to do clock partitioning againEddie Hung2019-12-051-37/+144
* | | Add assertionEddie Hung2019-12-031-0/+1
* | | Add abc9_init wire, attach to abc9_flop cellEddie Hung2019-12-031-2/+12
* | | CleanupEddie Hung2019-12-011-3/+2
* | | Fix debugEddie Hung2019-11-251-3/+3
* | | abc9 to contain time callEddie Hung2019-11-251-1/+1
* | | abc9 to no longer to clock partitioning, operate on whole modules onlyEddie Hung2019-11-251-139/+32
* | | Conditioning abc9 on POs not accurate due to cellsEddie Hung2019-11-231-15/+6
* | | When expanding upwards, do not capture $__ABC9_{FF,ASYNC}_Eddie Hung2019-11-211-1/+1
* | | endomain -> ctrldomainEddie Hung2019-11-201-3/+3
* | | Use "abc9_period" attribute for delay targetEddie Hung2019-10-071-3/+24
* | | Do not require changes to cells_sim.v; try and work out comb modelEddie Hung2019-10-051-30/+6
* | | Fix from mergeEddie Hung2019-10-041-1/+1
* | | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-10-041-2/+12
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| * | Add temporary `abc9 -nomfs` and use for `synth_xilinx -abc9`Eddie Hung2019-10-041-3/+13
* | | Fix merge issuesEddie Hung2019-10-041-2/+2
* | | Merge remote-tracking branch 'origin/eddie/abc_to_abc9' into xaig_dffEddie Hung2019-10-041-68/+67
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| * | Rename abc_* names/attributes to more precisely be abc9_*Eddie Hung2019-10-041-65/+65
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* | No need to punch ports at allEddie Hung2019-09-301-13/+0
* | Resolve FIXME on calling proc just onceEddie Hung2019-09-301-2/+2
* | Add commentEddie Hung2019-09-301-0/+1