| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | intel: move Cyclone V support to intel_alm | Dan Ravensloft | 2020-08-20 | 1 | -150/+0 |
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| * | Fixing issues in CycloneV cell sim | Diego | 2019-04-11 | 1 | -3/+9 |
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| * | Fix typographical and grammatical errors and inconsistencies. | whitequark | 2019-01-02 | 1 | -1/+1 |
| | | | | | | | | | | | | | The initial list of hits was generated with the codespell command below, and each hit was evaluated and fixed manually while taking context into consideration. DIRS="kernel/ frontends/ backends/ passes/ techlibs/" DIRS="${DIRS} libs/ezsat/ libs/subcircuit" codespell $DIRS -S *.o -L upto,iff,thru,synopsys,uint More hits were found by looking through comments and strings manually. | ||||
| * | Clean whitespace and permissions in techlibs/intel | Larry Doolittle | 2017-10-05 | 1 | -10/+10 |
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| * | Adding Cyclone IV (E, GX), Arria 10, Cyclone V and LPM functions (ALTPLL and ↵ | dh73 | 2017-10-01 | 1 | -0/+144 |
| M9K); M9K is not finished yet. Achronix Speedster also in this commit. Both Arria10 and Speedster-i are still experimental due complexity, but you can experiment around those devices right now | |||||
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index : iCE40/yosys | |
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