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* intel: move Cyclone V support to intel_almDan Ravensloft2020-08-203-347/+0
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* intel: Use dfflegalize.Marcelina Kościelnicka2020-07-131-37/+0
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* Update dff2dffe, dff2dffs, zinit to new FF types.Marcelina Kościelnicka2020-06-231-1/+1
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* Add force_downto and force_upto wire attributes.Marcelina Kościelnicka2020-05-192-0/+7
| | | | Fixes #2058.
* Fixing issues in CycloneV cell simDiego2019-04-111-3/+9
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* Reduce amount of trailing whitespace in code baseLarry Doolittle2019-02-281-2/+2
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* Fix typographical and grammatical errors and inconsistencies.whitequark2019-01-021-1/+1
| | | | | | | | | | | | The initial list of hits was generated with the codespell command below, and each hit was evaluated and fixed manually while taking context into consideration. DIRS="kernel/ frontends/ backends/ passes/ techlibs/" DIRS="${DIRS} libs/ezsat/ libs/subcircuit" codespell $DIRS -S *.o -L upto,iff,thru,synopsys,uint More hits were found by looking through comments and strings manually.
* Fixed broken Quartus backend on dffeas init value (Error (12170): Illegal ↵c60k282018-03-311-32/+43
| | | | value for the POWER_UP parameter. Fixed and tested Cyclone V device
* Clean whitespace and permissions in techlibs/intelLarry Doolittle2017-10-053-69/+69
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* Adding Cyclone IV (E, GX), Arria 10, Cyclone V and LPM functions (ALTPLL and ↵dh732017-10-013-0/+360
M9K); M9K is not finished yet. Achronix Speedster also in this commit. Both Arria10 and Speedster-i are still experimental due complexity, but you can experiment around those devices right now