3 files changed, 38 insertions, 6 deletions
diff --git a/testsuite/gna/issue2/repro.vhdl b/testsuite/gna/issue2/repro.vhdl
new file mode 100644
index 000000000..e58e894bf
--- /dev/null
+++ b/testsuite/gna/issue2/repro.vhdl
@@ -0,0 +1,15 @@
+entity repro is
+    port (
+        foo: in boolean
+    );
+end entity;
+
+architecture foo of repro is
+    signal foo_int: boolean;
+begin
+FUMBLE: 
+    entity work.repro
+        port map (
+            foo => foo_int
+        );
+end architecture;
diff --git a/testsuite/gna/issue2/repro2.vhdl b/testsuite/gna/issue2/repro2.vhdl
new file mode 100644
index 000000000..ae989a7a9
--- /dev/null
+++ b/testsuite/gna/issue2/repro2.vhdl
@@ -0,0 +1,15 @@
+entity repro2 is
+  generic (depth : natural := 7);
+  port (foo: in boolean);
+end entity;
+
+architecture foo of repro2 is
+    signal foo_int: boolean;
+begin
+  cond: if depth > 0 generate
+    FUMBLE:
+      entity work.repro2
+        generic map (depth => depth - 1)
+        port map (foo => foo_int);
+  end generate;
+end architecture;
diff --git a/testsuite/gna/issue2/testsuite.sh b/testsuite/gna/issue2/testsuite.sh
index ffa23903f..bad36b3e9 100755
--- a/testsuite/gna/issue2/testsuite.sh
+++ b/testsuite/gna/issue2/testsuite.sh
@@ -5,16 +5,18 @@
 GHDL_STD_FLAGS=--std=08
 GHDL_FLAGS=--work=test
 
+analyze repro.vhdl
+analyze repro2.vhdl
+elab_simulate repro2
+
 analyze sortnet_OddEvenSort.vhdl
 analyze sortnet_OddEvenSort_tb.vhdl
 elab_simulate --syn-binding sortnet_OddEvenSort_tb
 
-if false; then
- # Direct instantiation, not yet supported.
- analyze sortnet_BitonicSort.vhdl
- analyze sortnet_BitonicSort_tb.vhdl
- elab_simulate sortnet_BitonicSort_tb
-fi
+# Direct instantiation, not yet supported.
+analyze sortnet_BitonicSort.vhdl
+analyze sortnet_BitonicSort_tb.vhdl
+elab_simulate sortnet_BitonicSort_tb
 
 clean test