index
:
iCE40/nextpnr
master
[no description]
about
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
fpga_interchange
Commit message (
Expand
)
Author
Age
Files
Lines
*
interchange: Add macro parameter mapping
gatecat
2021-05-21
2
-3
/
+53
*
interchange: Don't error out on missing cell ports
gatecat
2021-05-21
2
-2
/
+3
*
interchange: Add LUTRAM test
gatecat
2021-05-21
6
-0
/
+169
*
interchange: Preliminary implementation of macro expansion
gatecat
2021-05-21
3
-0
/
+116
*
interchange: Add macro param map rules to chipdb
gatecat
2021-05-21
1
-0
/
+24
*
interchange: Add macro data to chipdb
gatecat
2021-05-21
1
-1
/
+51
*
interchange: phys: add site instance idstr for pseudo tile PIPs
Alessandro Comodi
2021-05-19
1
-0
/
+19
*
Run clangformat
gatecat
2021-05-16
2
-5
/
+7
*
interchange: pseudo pips: fix illegal tile pseudo PIPs
Alessandro Comodi
2021-05-14
3
-21
/
+62
*
interchange: site router: add valid pips list to check during routing
Alessandro Comodi
2021-05-13
3
-11
/
+59
*
interchange: arch: do not allow site pips within sites
Alessandro Comodi
2021-05-12
1
-6
/
+0
*
interchange: Fix bounding box computation
gatecat
2021-05-11
1
-2
/
+2
*
interchange: site router: fix log messages
Alessandro Comodi
2021-05-10
1
-3
/
+3
*
interchange: site router: fix illegal site thru paths
Alessandro Comodi
2021-05-10
2
-0
/
+23
*
interchange: Adding a basic global buffer placer
gatecat
2021-05-07
3
-32
/
+132
*
interchange: Initial global routing implementation
gatecat
2021-05-07
3
-0
/
+222
*
interchange: Add more global cell info
gatecat
2021-05-07
1
-1
/
+14
*
Add stub cluster API impl for remaining arches
gatecat
2021-05-06
2
-0
/
+15
*
interchange/nexus: Add counter example
gatecat
2021-04-30
8
-3
/
+61
*
interchange: Implement getWireType
gatecat
2021-04-30
1
-1
/
+18
*
interchange: Add wire types to chipdb
gatecat
2021-04-30
1
-1
/
+17
*
Merge pull request #683 from antmicro/interchange-allow-loc-keyword
gatecat
2021-04-20
1
-2
/
+4
|
\
|
*
interchange: allow LOC keyword in XDC files
Jan Kowalewski
2021-04-20
1
-2
/
+4
*
|
interchange: Handle disconnected/missing cell pins
gatecat
2021-04-19
3
-6
/
+56
*
|
interchange: Add default cell connections to chipdb
gatecat
2021-04-19
1
-1
/
+24
*
|
Add Python bindings for placement tests
gatecat
2021-04-15
1
-0
/
+5
*
|
Merge pull request #678 from acomodi/initial-fasm-generation
gatecat
2021-04-14
20
-70
/
+135
|
\
\
|
*
|
interchange: add FASM generation target and clean-up tests
Alessandro Comodi
2021-04-14
20
-70
/
+135
|
|
/
*
/
Hash table refactoring
gatecat
2021-04-14
6
-10
/
+11
|
/
*
interchange: Allow pseudo-cells with no input pins
gatecat
2021-04-13
1
-14
/
+35
*
clangformat
gatecat
2021-04-12
8
-133
/
+134
*
interchange: Disambiguate cell and bel pins when creating Vcc ties
gatecat
2021-04-09
1
-6
/
+10
*
[interchange] Provide estimateDelay when USE_LOOKAHEAD is not defined.
Keith Rothman
2021-04-06
1
-1
/
+16
*
[interchange] Remove requirement to have wire_lut.
Keith Rothman
2021-04-06
3
-6
/
+7
*
[interchange] Fix invalid use of local variables due to refactoring.
Keith Rothman
2021-04-06
3
-6
/
+7
*
[interchange] Prevent site router from generating incorrect LUTs.
Keith Rothman
2021-04-06
3
-42
/
+102
*
[interchange] Scale edge cost of pseudo pips.
Keith Rothman
2021-04-06
2
-5
/
+12
*
[interchange] Fix missing inline methods in site_arch.impl.h
Keith Rothman
2021-04-06
2
-8
/
+9
*
[interchange] Disallow site edges during general routing.
Keith Rothman
2021-04-06
2
-5
/
+23
*
[interchange] Add crude pseudo pip model.
Keith Rothman
2021-04-06
6
-7
/
+717
*
Merge pull request #661 from litghost/document_site_router
gatecat
2021-04-06
1
-10
/
+58
|
\
|
*
[interchange] Add some documentation for the site router.
Keith Rothman
2021-04-05
1
-10
/
+58
*
|
Merge pull request #657 from acomodi/interchange-counter-multi-board
gatecat
2021-04-06
5
-23
/
+25
|
\
\
|
|
/
|
/
|
|
*
interchange: counter: testing on multiple boards
Alessandro Comodi
2021-04-01
5
-23
/
+25
*
|
[interchange] Update to v6 of FPGA interchange chipdb.
Keith Rothman
2021-04-01
3
-2
/
+12
|
/
*
Merge pull request #646 from YosysHQ/gatecat/nexus-cmake
gatecat
2021-03-31
13
-126
/
+368
|
\
|
*
interchange: Fix nexus cmake review comments
gatecat
2021-03-31
3
-9
/
+4
|
*
interchange: Split xc7 and nexus chipdb cmake
gatecat
2021-03-30
3
-243
/
+245
|
*
interchange: Add Nexus LUT test
gatecat
2021-03-30
7
-19
/
+139
|
*
interchange: Add Nexus to CI
gatecat
2021-03-30
3
-1
/
+11
[next]