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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add init supportEddie Hung2019-08-212-3/+12
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix spacingEddie Hung2019-08-211-2/+2
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initial progress on xilinx_srlEddie Hung2019-08-213-0/+213
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| * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Format `-pwires`Eddie Hung2019-08-301-1/+1
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| * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge pull request #1343 from whitequark/diamond-ffsDavid Shah2019-08-307-106/+147
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | |_|_|_|_|_|_|_|_|_|_|_|/ / / / / / / / / / / / / / / / / / / / / / / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add/update every Diamond FF primitive
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ecp5: Add simulation equivalence check for Diamond FF implementationsDavid Shah2019-08-303-0/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ecp5: deduplicate Diamond FD/IFS/OFS/IO primitives.whitequark2019-08-305-95/+60
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ecp5: allow (and enable by default) GSR on FD/IFS/OFS primitives.whitequark2019-08-301-35/+20
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ecp5: add missing FD primitives.whitequark2019-08-302-72/+76
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ecp5: fix CEMUX on IFS/OFS primitives.whitequark2019-08-302-18/+18
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| * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge pull request #1337 from YosysHQ/eddie/fix_carry_wrapperEddie Hung2019-08-297-27/+71
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | |_|_|_|_|_|_|_|_|_|_|/ / / / / / / / / / / / / / / / / / / / / / / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix $__ICE40_CARRY_WRAPPER, restore abc9 functionality
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename boxes tooEddie Hung2019-08-293-3/+3
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add run-test.sh tooEddie Hung2019-08-281-0/+20
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not overwrite LUT paramEddie Hung2019-08-281-1/+0
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add SB_CARRY to ice40_opt testEddie Hung2019-08-281-3/+5
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add ice40_opt testEddie Hung2019-08-281-0/+24
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Trailing commaEddie Hung2019-08-281-1/+1
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adapt to $__ICE40_CARRY_WRAPPEREddie Hung2019-08-281-3/+5
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Revert "Remove $__ICE40_FULL_ADDER handling from ice40_opt; cannot reason with"Eddie Hung2019-08-281-0/+45
| | | |_|_|_|_|_|_|_|_|_|_|_|_|_|_|/ / / / / / / / / / / / / / / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 2aedee1f0e0f6a6214241f51f5c12d4b67c3ef6f.
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove $__ICE40_FULL_ADDER handling from ice40_opt; cannot reason withEddie Hung2019-08-281-45/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CARRY_WRAPPER in the same way since I0 and I3 could be used
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update box size and timingsEddie Hung2019-08-283-12/+12
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update to new $__ICE40_CARRY_WRAPPEREddie Hung2019-08-281-11/+8
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| * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix typo that's gone unnoticed for 5 months!?!Eddie Hung2019-08-291-1/+1
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| * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bump YOSYS_VERClifford Wolf2019-08-291-1/+1
| |/ / / / / / / / / / / / / / / / / / / / / / / / / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| | | | | | | | | | | | * | | | | | | | | | | | | | | | | | | Add constant expression attribute to testEddie Hung2019-08-291-0/+1
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| | | | | | | | | | | | * | | | | | | | | | | | | | | | | | | Remove newlineEddie Hung2019-08-291-1/+0
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| | | | | | | | | | | | * | | | | | | | | | | | | | | | | | | Restore non-deferred code, deferred case to ignore non constant attrEddie Hung2019-08-291-5/+12
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| | | | | | | | | | | | * | | | | | | | | | | | | | | | | | | -auto-top should check $abstract (deferred) modules with (* top *)Eddie Hung2019-08-281-0/+31
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| | | | | | | | | | | | * | | | | | | | | | | | | | | | | | | read_verilog -defer should still populate module attributesEddie Hung2019-08-281-5/+6
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| | | | | | | | | | | | * | | | | | | | | | | | | | | | | | | Add failing testEddie Hung2019-08-281-0/+18
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| * | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge pull request #1334 from YosysHQ/clifford/async2synclatchEddie Hung2019-08-281-1/+36
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | |_|_|_|_|_|_|_|_|/ / / / / / / / / / / / / / / / / / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | Add $dlatch support to async2sync
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | Add $dlatch support to async2syncClifford Wolf2019-08-281-1/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add (* clkbuf_sink *) to SRLC16E, reorder ports to match vendorEddie Hung2019-08-281-3/+8
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| * | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge pull request #1332 from YosysHQ/dave/ecp5gsrDavid Shah2019-08-286-54/+212
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ecp5: Add GSR and SGSR support
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | ecp5: Add GSR supportDavid Shah2019-08-276-54/+212
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge pull request #1335 from YosysHQ/clifford/paramapClifford Wolf2019-08-281-68/+119
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | |_|/ / / / / / / / / / / / / / / / / / / / / / / / / / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add "paramap" pass
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix typoClifford Wolf2019-08-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | Add "paramap" passClifford Wolf2019-08-281-67/+118
| |/ / / / / / / / / / / / / / / / / / / / / / / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge pull request #1325 from YosysHQ/eddie/sat_initClifford Wolf2019-08-282-2/+8
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In sat: 'x' in init attr should be ignored
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | Ignore all 1'bx in (* init *)Eddie Hung2019-08-271-3/+1
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | Revert to using cleanEddie Hung2019-08-271-1/+1
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | Wire with init on FF part, 1'bx on non-FF partEddie Hung2019-08-241-1/+3
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | Blocking assignmentEddie Hung2019-08-231-1/+1
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | In sat: 'x' in init attr should not override constantEddie Hung2019-08-223-1/+7
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| * | | | | | | | | | | | | | | | | | | | | | | | | | | | | xilinx: Add SRLC16E primitive.Marcin Kościelnicki2019-08-271-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes #1331.
| * | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge pull request #1292 from YosysHQ/mwk/xilinx_bufgmapEddie Hung2019-08-2716-223/+1075
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | |_|/ / / / / / / / / / / / / / / / / / / / / / / / / / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clock buffer insertion pass, improve iopadmap.
| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | improve clkbuf_inhibit propagation upwards through hierarchyMarcin Kościelnicki2019-08-272-6/+45
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | Improve tests to check that clkbuf is connected to expectedEddie Hung2019-08-261-6/+21
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge branch 'master' into mwk/xilinx_bufgmapEddie Hung2019-08-268-60/+405
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| | * | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge branch 'master' into mwk/xilinx_bufgmapEddie Hung2019-08-231-1/+1
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generated by cgit v1.2.3 (git 2.25.1) at 2025-07-15 03:13:36 +0000