| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | intel_alm: preliminary Arria V support | Lofty | 2021-11-25 | 1 | -0/+47 |
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| * | intel_alm: Add multiply signedness to cells | Dan Ravensloft | 2020-08-26 | 1 | -3/+48 |
| | | | | | | | Quartus assumes unsigned multiplication by default, breaking signed multiplies, so add an input signedness parameter to the MISTRAL_MUL* cells to propagate to Quartus' <family>_mac cells. | ||||
| * | intel_alm: fix typo in MISTRAL_MUL27X27 cell name | Dan Ravensloft | 2020-08-13 | 1 | -1/+1 |
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| * | intel_alm: add additional ABC9 timings | Dan Ravensloft | 2020-07-23 | 1 | -6/+9 |
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| * | intel_alm: DSP inference | Dan Ravensloft | 2020-07-05 | 1 | -0/+35 |
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index : iCE40/yosys | |
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