| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | intel_alm: M10K write-enable is negative-true | Lofty | 2022-03-09 | 1 | -2/+7 |
| * | intel_alm: preliminary Arria V support | Lofty | 2021-11-25 | 1 | -1/+12 |
| * | intel_alm: Add global buffer insertion | gatecat | 2021-05-15 | 1 | -0/+16 |
| * | intel_alm: Add IO buffer insertion | gatecat | 2021-05-15 | 1 | -0/+44 |
| * | intel_alm: Add multiply signedness to cells | Dan Ravensloft | 2020-08-26 | 1 | -3/+45 |
| * | intel_alm: direct M10K instantiation | Dan Ravensloft | 2020-07-27 | 1 | -1/+50 |
| * | Revert "intel_alm: direct M10K instantiation" | Lofty | 2020-07-13 | 1 | -45/+0 |
| * | intel_alm: direct M10K instantiation | Dan Ravensloft | 2020-07-05 | 1 | -0/+45 |
| * | intel_alm: DSP inference | Dan Ravensloft | 2020-07-05 | 1 | -0/+23 |
| * | intel_alm: direct LUTRAM cell instantiation | Dan Ravensloft | 2020-05-07 | 1 | -0/+39 |
| * | intel_alm: cleanup duplication | Dan Ravensloft | 2020-04-24 | 1 | -0/+63 |
| * | synth_intel_alm: VQM support | Dan Ravensloft | 2020-04-15 | 1 | -6/+2 |
| * | synth_intel_alm: alternative synthesis for Intel FPGAs | Dan Ravensloft | 2020-04-15 | 1 | -0/+23 |
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