| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Rename abc_* names/attributes to more precisely be abc9_* | Eddie Hung | 2019-10-04 | 1 | -1165/+0 |
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| * | Merge pull request #1359 from YosysHQ/xc7dsp | Eddie Hung | 2019-09-29 | 1 | -0/+1104 |
| |\ | | | | | DSP inference for Xilinx (improved for ice40, initial support for ecp5) | ||||
| | * | Fix DSP48E1 timing by breaking P path if MREG or PREG | Eddie Hung | 2019-09-19 | 1 | -300/+300 |
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| | * | Revert "Different approach to timing" | Eddie Hung | 2019-09-19 | 1 | -50/+300 |
| | | | | | | | | | This reverts commit 41256f48a5f3231e231cbdf9380a26128f272044. | ||||
| | * | Different approach to timing | Eddie Hung | 2019-09-19 | 1 | -300/+50 |
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| | * | Fix D -> P{,COUT} delay | Eddie Hung | 2019-09-13 | 1 | -43/+43 |
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| | * | Add no MULT no DPORT config | Eddie Hung | 2019-09-13 | 1 | -1/+364 |
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| | * | Add support for MULT and DPORT | Eddie Hung | 2019-09-13 | 1 | -0/+365 |
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| | * | Finish explanation | Eddie Hung | 2019-09-12 | 1 | -1/+10 |
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| | * | Initial DSP48E1 box support | Eddie Hung | 2019-09-12 | 1 | -0/+367 |
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| * | | Fix box name | Eddie Hung | 2019-09-27 | 1 | -1/+1 |
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| * | Add comments | Eddie Hung | 2019-09-02 | 1 | -1/+9 |
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| * | xilinx to use abc_map.v with -max_iter 1 | Eddie Hung | 2019-08-20 | 1 | -2/+2 |
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| * | Remove sequential extension | Eddie Hung | 2019-08-20 | 1 | -41/+0 |
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| * | Wrap LUTRAMs in order to capture comb/seq behaviour | Eddie Hung | 2019-08-20 | 1 | -21/+14 |
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| * | Update box timings | Eddie Hung | 2019-08-19 | 1 | -6/+9 |
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| * | Add Tsu offset to boxes, and comments | Eddie Hung | 2019-07-11 | 1 | -6/+11 |
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| * | ABC doesn't like negative delays in flop boxes... | Eddie Hung | 2019-07-11 | 1 | -6/+6 |
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| * | Fix FDCE_1 box | Eddie Hung | 2019-07-11 | 1 | -1/+1 |
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| * | Revert "$pastQ should be first input" | Eddie Hung | 2019-07-11 | 1 | -13/+13 |
| | | | | | This reverts commit 8f9d529929f43e6ba98f06159ae9533984c6264f. | ||||
| * | $pastQ should be first input | Eddie Hung | 2019-07-11 | 1 | -13/+13 |
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| * | Fix typo | Eddie Hung | 2019-07-11 | 1 | -1/+1 |
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| * | Simplify to $__ABC_ASYNC box | Eddie Hung | 2019-07-11 | 1 | -3/+3 |
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| * | Move ABC FF stuff to abc_ff.v; add support for other FD* types | Eddie Hung | 2019-07-10 | 1 | -5/+20 |
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| * | Fix box numbering | Eddie Hung | 2019-07-10 | 1 | -4/+4 |
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| * | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2019-07-10 | 1 | -7/+12 |
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| | * | Fix $__XILINX_MUXF78 box timing | Eddie Hung | 2019-07-01 | 1 | -1/+1 |
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| | * | Revert "Fix broken MUXFx box, use MUXF7x2 box instead" | Eddie Hung | 2019-07-01 | 1 | -5/+4 |
| | | | | | | | | | This reverts commit a9a140aa6c84e71edc1a244cfe363400c7e09d90. | ||||
| | * | Fix broken MUXFx box, use MUXF7x2 box instead | Eddie Hung | 2019-07-01 | 1 | -4/+5 |
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| | * | MUXF78 -> $__MUXF78 to indicate internal | Eddie Hung | 2019-06-26 | 1 | -1/+1 |
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| | * | Merge remote-tracking branch 'origin/xaig' into xc7mux | Eddie Hung | 2019-06-26 | 1 | -2/+3 |
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| | * | | Cleanup abc_box_id | Eddie Hung | 2019-06-26 | 1 | -5/+5 |
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| | * | | Realistic delays for RAM32X1D too | Eddie Hung | 2019-06-24 | 1 | -2/+2 |
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| | * | | Merge remote-tracking branch 'origin/xaig' into xc7mux | Eddie Hung | 2019-06-24 | 1 | -4/+4 |
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| | * | | | Add RAM32X1D box info | Eddie Hung | 2019-06-24 | 1 | -2/+9 |
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| | * | | | Merge remote-tracking branch 'origin/xaig' into xc7mux | Eddie Hung | 2019-06-24 | 1 | -0/+14 |
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| | * \ \ \ | Merge remote-tracking branch 'origin/xaig' into xc7mux | Eddie Hung | 2019-06-22 | 1 | -46/+15 |
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| | * | | | | | Add $__XILINX_MUXF78 to preserve entire box | Eddie Hung | 2019-06-21 | 1 | -3/+8 |
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| * | | | | | | Update abc_box_id numbering | Eddie Hung | 2019-07-01 | 1 | -4/+4 |
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| * | | | | | | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2019-07-01 | 1 | -18/+29 |
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| | * | | | | | Update comment on boxes | Eddie Hung | 2019-06-26 | 1 | -2/+3 |
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| | * | | | | | Realistic delays for RAM32X1D too | Eddie Hung | 2019-06-25 | 1 | -2/+2 |
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| | * | | | | | Add RAM32X1D box info | Eddie Hung | 2019-06-25 | 1 | -2/+9 |
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| | * | | | | Use LUT delays for dist RAM delays | Eddie Hung | 2019-06-24 | 1 | -4/+4 |
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| | * | | | Add Xilinx dist RAM as comb boxes | Eddie Hung | 2019-06-24 | 1 | -0/+14 |
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| | * | | Add comment to xc7 box | Eddie Hung | 2019-06-22 | 1 | -0/+3 |
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| | * | | Carry in/out box ordering now move to end, not swap with end | Eddie Hung | 2019-06-22 | 1 | -12/+12 |
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| | * | | Remove DFF and RAMD box info for now | Eddie Hung | 2019-06-21 | 1 | -34/+0 |
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| * | | Add box delays for FD* | Eddie Hung | 2019-06-17 | 1 | -10/+10 |
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| * | | Cleanup | Eddie Hung | 2019-06-16 | 1 | -2/+2 |
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index : iCE40/yosys | |
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