| Commit message (Collapse) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| * | testsuite: add synth_ice40 (from synth), add synth_import. | Tristan Gingold | 2019-11-05 | 1 | -2/+14 | |
| | | ||||||
| * | testenv: use abs_topdir for default ghdl.so path. | Tristan Gingold | 2019-11-05 | 1 | -1/+8 | |
| | | ||||||
| * | Add testcase for #68 | Tristan Gingold | 2019-11-04 | 2 | -0/+31 | |
| | | ||||||
| * | testsuite: it is now possible to run a single test. | Tristan Gingold | 2019-11-04 | 14 | -11/+32 | |
| | | ||||||
| * | Add Id_Smod support (#66) | Anton Blanchard | 2019-11-03 | 3 | -0/+27 | |
| | | ||||||
| * | add iadff (#67) | Pepijn de Vos | 2019-11-03 | 1 | -1/+8 | |
| | | ||||||
| * | rewrite import_memory, directly generate $mem | Tristan Gingold | 2019-11-03 | 1 | -97/+130 | |
| | | ||||||
| * | handle formal input ports. | Tristan Gingold | 2019-10-31 | 1 | -5/+31 | |
| | | ||||||
| * | Handle Id_Cover_Assert | Tristan Gingold | 2019-10-22 | 1 | -0/+2 | |
| | | ||||||
| * | Initial support of memories. | Tristan Gingold | 2019-10-19 | 1 | -18/+152 | |
| | | ||||||
| * | Sign extend 32b literals (#61) | Pepijn de Vos | 2019-10-16 | 3 | -4/+78 | |
| | | | | | | | | | | | | | | | | | | | | * sign extend 32b literals * Fix undefined behavior Right shift of a signed values is undefined but does arithemetic shift in practice. However, shifting by more than one int width is also undefined but *wraps around*. This caused bit/log to work because it'd shift mod 32. But it actually cause the UL32 to be wrong because it'd just repeat the value rather than extending. * zero pad unsigned and add signed * add testsuite | |||||
| * | Add Id_Neg support (#63) | Anton Blanchard | 2019-10-16 | 3 | -0/+27 | |
| | | | | | | | | | * Add Id_Neg support * Add testcase for Id_Neg Thanks to Pepijn for the example I based this on. | |||||
| * | Add Id_Smul and Id_Umul (#64) | Anton Blanchard | 2019-10-16 | 3 | -0/+34 | |
| | | | | | | | * Add Id_Smul and Id_Umul support * Add testcase for Id_Smul and Id_Umul | |||||
| * | Fix a couple of compiler warnings (#62) | Anton Blanchard | 2019-10-14 | 1 | -3/+3 | |
| | | | | | | | | | | | | | | | | | | I see a few compiler warnings on gcc 9.2: src/ghdl.cc: In function ‘Yosys::RTLIL::SigSpec get_src(std::vector<Yosys::RTLIL::Wire*>&, GhdlSynth::Net)’: src/ghdl.cc:123:43: warning: ‘valzx’ may be used uninitialized in this function [-Wmaybe-uninitialized] 123 | switch(((val01 >> i)&1)+((valzx >> i)&1)*2) | ~~~~~~~^~~~~ src/ghdl.cc:123:26: warning: ‘val01’ may be used uninitialized in this function [-Wmaybe-uninitialized] 123 | switch(((val01 >> i)&1)+((valzx >> i)&1)*2) | ~~~~~~~^~~~~ src/ghdl.cc:99:26: warning: ‘val’ may be used uninitialized in this function [-Wmaybe-uninitialized] 99 | bits[i] = (val >> i) & 1 ? RTLIL::State::S1 : RTLIL::State::S0; | ~~~~~^~~~~ These both appear to be spurious, but initialize them to 0 to avoid the warning. | |||||
| * | Handle Id_Sextend (#59) | T. Meissner | 2019-10-09 | 1 | -0/+8 | |
| | | ||||||
| * | testsuite: Add formal tests (#57) | T. Meissner | 2019-10-07 | 25 | -25/+359 | |
| | | | | | | | | | | | | | | | | | | | * Add formal tests for shift operations * ci: build ghdl/synth:formal and run test suites in it * add testsuite/formal/testsuite.sh * create testsuite/issues * ci: remove a level of grouping * testenv: fix SYMBIYOSYS * refactor * testsuite/formal/shifts: Add check for shifts > vector length | |||||
| * | Handle Id_Asr (#55) | T. Meissner | 2019-10-06 | 1 | -0/+4 | |
| | | ||||||
| * | add shift functions (#54) | Pepijn de Vos | 2019-10-06 | 1 | -0/+8 | |
| | | ||||||
| * | Handle Const_X & Const_Z (#49) | T. Meissner | 2019-10-05 | 1 | -0/+12 | |
| | | ||||||
| * | handle Const_Log | Tristan Gingold | 2019-10-02 | 1 | -25/+34 | |
| | | ||||||
| * | Handle Const_Bit. | Tristan Gingold | 2019-10-02 | 1 | -0/+14 | |
| | | ||||||
| * | Handle covers (#43) | T. Meissner | 2019-09-20 | 1 | -0/+4 | |
| | | ||||||
| * | Remove Id_Insert (unused). | Tristan Gingold | 2019-09-09 | 1 | -17/+0 | |
| | | ||||||
| * | Fix incomplete handling of Concatn | Tristan Gingold | 2019-09-07 | 1 | -2/+3 | |
| | | ||||||
| * | Icestick uart (#37) | marph91 | 2019-08-22 | 7 | -0/+212 | |
| | | | | | | | * added UART example for the icestick * extended testsuite by the UART example | |||||
| * | Run testsuite in Travis CI with docker images (#31) | 1138-4EB | 2019-08-16 | 17 | -123/+275 | |
| | | | | | | | | | | | | | * makefile: use '--build' shortcut to build ghdl.so * move: rename subdir 'ghdl' to 'src' * travis: add travis config file, build script and utils script * testsuite: do not call ghdl explicitly * readme: update | |||||
| * | handle utrunc/strunc. For #33 | Tristan Gingold | 2019-08-16 | 1 | -0/+10 | |
| | | ||||||
| * | Use libghdl to build the module. Update instructions. | Tristan Gingold | 2019-08-15 | 2 | -23/+24 | |
| | | ||||||
| * | ghdl: initialize for synthesis. | Tristan Gingold | 2019-08-14 | 1 | -2/+7 | |
| | | ||||||
| * | Build with libghdl (WIP). | Tristan Gingold | 2019-08-14 | 2 | -2/+2 | |
| | | ||||||
| * | add subtract (#30) | Pepijn de Vos | 2019-08-01 | 1 | -0/+4 | |
| | | ||||||
| * | add signed compare (#29) | Pepijn de Vos | 2019-07-31 | 1 | -0/+16 | |
| | | ||||||
| * | Remove to be deprecated const gates, add concatn, reformat. | Tristan Gingold | 2019-07-31 | 1 | -46/+39 | |
| | | ||||||
| * | add const_ul32 support (#28) | Pepijn de Vos | 2019-07-28 | 1 | -3/+46 | |
| | | ||||||
| * | Handle isignal like signal. | Tristan Gingold | 2019-07-27 | 1 | -0/+3 | |
| | | ||||||
| * | add user cell (#25) | Pepijn de Vos | 2019-07-21 | 1 | -1/+39 | |
| | | | | | | | * add user cell * create black box modules | |||||
| * | add comparison cells and adff (#23) | Pepijn de Vos | 2019-07-16 | 1 | -0/+20 | |
| | | ||||||
| * | handle reduce, assumes; uses get_input_net | Tristan Gingold | 2019-07-04 | 1 | -11/+19 | |
| | | ||||||
| * | Handle assertions. | Tristan Gingold | 2019-07-03 | 1 | -1/+7 | |
| | | ||||||
| * | testenv.sh: do not quote YOSYS | Tristan Gingold | 2019-07-03 | 1 | -1/+1 | |
| | | ||||||
| * | ghdl.cc: handle Insert, ignore Edge, adjust. | Tristan Gingold | 2019-07-03 | 1 | -14/+30 | |
| | | ||||||
| * | README: adjust. | Tristan Gingold | 2019-07-03 | 1 | -7/+15 | |
| | | ||||||
| * | Makefile: add install target. | Tristan Gingold | 2019-07-03 | 1 | -4/+11 | |
| | | ||||||
| * | Todo's in readme and change of license (#19) | Roland Coeurjoly | 2018-11-18 | 2 | -17/+690 | |
| | | | | | | | | | | | * Installation instructions updated * Disable errors before installing libghdlsynth and fix typo * Add comments to README about pending actions * Change license to GPLv3+ | |||||
| * | Disable errors before installing libghdlsynth and fix typo (#17) | Roland Coeurjoly | 2018-11-17 | 1 | -0/+6 | |
| | | | | | | | | | * Installation instructions updated * Disable errors before installing libghdlsynth and fix typo * Add comments to README about pending actions | |||||
| * | Installation instructions updated (#16) | Roland Coeurjoly | 2018-01-03 | 1 | -5/+12 | |
| | | ||||||
| * | Add tests for nand, nor, xnor. | Tristan Gingold | 2017-02-26 | 4 | -0/+51 | |
| | | ||||||
| * | Handle nor, nand, xnor. | Tristan Gingold | 2017-02-26 | 1 | -0/+22 | |
| | | ||||||
| * | Add testcase for #11 | Tristan Gingold | 2017-02-26 | 3 | -0/+39 | |
| | | ||||||
| * | Support or and xor gates | Tristan Gingold | 2017-02-26 | 1 | -0/+8 | |
| | | | | | Fix #11 | |||||
 |
index : iCE40/ghdl-yosys-plugin | |
| [no description] |
| aboutsummaryrefslogtreecommitdiffstats |