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* synth: handle conv_signed. Fix #2408Tristan Gingold2023-04-141-1/+3
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* synth-vhdl_eval: handle std_logic_arith.conv_std_logic_vectorTristan Gingold2023-02-091-0/+7
| | | | Fix #2347
* synth: do not handle null-vectors for to_hstring.Tristan Gingold2023-02-081-0/+16
| | | | For #2338
* synth: use same layout for records in memory as translateTristan Gingold2023-02-081-1/+1
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* synth-vhdl_eval: minor reformattingTristan Gingold2023-01-281-18/+18
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* synth-vhdl_eval: add an overflow checkTristan Gingold2023-01-161-2/+6
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* synth-vhdl_eval: remove useless type unsharing for concatTristan Gingold2023-01-141-12/+4
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* synth-vhdl_eval: handle to_X01 for bit to std_ulogic.Tristan Gingold2023-01-111-0/+9
| | | | Fix #2307
* synth: handle universal r*i and i*r mul, physical mod.Tristan Gingold2023-01-111-1/+9
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* synth: add a check for v87 concatenationsTristan Gingold2023-01-111-1/+6
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* synth: fix memory allocation in predefined function callsTristan Gingold2023-01-101-0/+2
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* synth: check rem/mod by 0Tristan Gingold2023-01-101-2/+14
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* synth: also fix #2299Tristan Gingold2023-01-101-3/+6
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* synth: fix handling of extended enumeration identifiers.Tristan Gingold2023-01-091-1/+24
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* synth: fix to_string for characterTristan Gingold2023-01-021-1/+9
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* synth-vhdl_eval: minor refactoringTristan Gingold2022-11-301-32/+38
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* synth-vhdl_eval(eval_static_predefined_function_call): handle all operationsTristan Gingold2022-11-281-939/+918
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* synth: internal refactoringTristan Gingold2022-10-291-109/+67
| | | | use memtyp for eval_static_predefined_function_call
* synth-vhdl_eval: handle std_logic_misc reduce functionsTristan Gingold2022-10-191-0/+27
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* synth: detect division by 0, handle universal real/integer divisionTristan Gingold2022-10-021-3/+23
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* synth: handle read for floatsTristan Gingold2022-09-301-0/+12
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* synth-vhdl_eval: handle nor, nandTristan Gingold2022-09-261-0/+21
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* synth: rework error procedure, always pass the instanceTristan Gingold2022-09-251-54/+66
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* synth-vhdl_eval: handle vhdl-87 array array concatenationTristan Gingold2022-09-251-2/+31
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* synth-vhdl_eval: handle null-null in array concatenationsTristan Gingold2022-09-251-0/+6
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* synth: improve file handling (skip extra data, errors)Tristan Gingold2022-09-171-0/+3
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* synth: detect overflow in static exponentiationTristan Gingold2022-09-141-3/+16
| | | | src/grt: extract grt.arith from grt.lib
* synth: improve handling of top-level interfaces subtypeTristan Gingold2022-09-111-4/+8
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* synth-vhdl_eval: handle std_logic_signed and std_logic_unsignedTristan Gingold2022-09-061-55/+111
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* synth: add evaluation for ieee.std_logic_arithTristan Gingold2022-09-051-25/+377
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* synth: use areapoolsTristan Gingold2022-09-021-4/+12
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* vhdl: recognize log10 and sqrt from math_real. Fix #2176Tristan Gingold2022-08-141-0/+14
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* grt: add real now variable.Tristan Gingold2022-07-201-0/+3
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* synth-vhdl_eval: add support for more operationsTristan Gingold2022-06-111-1/+10
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* vhdl: recognize ieee.math_real.sign, fix is_x recogn.Tristan Gingold2022-06-111-4/+21
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* synth-vhdl_eval: handle more operationsTristan Gingold2022-06-071-8/+17
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* synth-vhdl_eval: handle more operationsTristan Gingold2022-06-061-1/+16
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* synth-vhdl_eval: recognize and handle to_stdulogicvectorTristan Gingold2022-06-061-2/+4
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* synth-vhdl_eval: handle more operationsTristan Gingold2022-06-051-36/+110
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* synth-vhdl_eval: handle more operations (sgn/uns reduce)Tristan Gingold2022-06-051-6/+16
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* synth-vhdl-eval: handle more operationsTristan Gingold2022-06-051-24/+122
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* synth-vhdl_eval: handle rotations and shift for numeric_stdTristan Gingold2022-06-051-4/+40
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* synth-vhdl_eval: handle to_x01, to_ux01, to_x01z and is_xTristan Gingold2022-06-051-18/+51
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* synth-vhdl_eval: handle more operationsTristan Gingold2022-06-051-2/+22
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* synth-vhdl_eval: handle find_leftmost and find_rightmostTristan Gingold2022-06-051-0/+13
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* synth-vhdl_eval: handle minmaxTristan Gingold2022-06-041-66/+79
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* synth-vhdl_eval: handle more operators (nand, nor, xnor)Tristan Gingold2022-06-041-0/+15
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* synth-vhdl_eval: add support for more operators.Tristan Gingold2022-06-041-15/+59
| | | | Fix some corner cases
* synth-vhdl_eval: handle rotationsTristan Gingold2022-06-041-0/+9
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* synth-vhdl_eval: handle more operations, fix resize corner caseTristan Gingold2022-06-031-23/+65
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