| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | WIP | Eddie Hung | 2019-04-28 | 1 | -36/+22 |
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| * | Revert synth_xilinx 'fine' label more to how it used to be... | Eddie Hung | 2019-04-26 | 1 | -21/+40 |
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| * | Where did this check come from!?! | Eddie Hung | 2019-04-26 | 1 | -1/+0 |
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| * | Update help message | Eddie Hung | 2019-04-22 | 1 | -1/+1 |
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| * | Move 'shregmap -tech xilinx' into map_cells | Eddie Hung | 2019-04-22 | 1 | -17/+20 |
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| * | Merge remote-tracking branch 'origin/master' into xc7srl | Eddie Hung | 2019-04-22 | 1 | -0/+2 |
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| | * | Re-added clean after techmap in synth_xilinx | Clifford Wolf | 2019-04-22 | 1 | -0/+2 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | Tidy up, fix for -nosrl | Eddie Hung | 2019-04-21 | 1 | -8/+7 |
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| * | | Merge branch 'map_cells_before_map_luts' into xc7srl | Eddie Hung | 2019-04-21 | 1 | -2/+2 |
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| | * | Merge branch 'master' into map_cells_before_map_luts | Eddie Hung | 2019-04-21 | 1 | -11/+12 |
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| | | * | Revert "synth_* with -retime option now calls abc with -D 1 as well" | Eddie Hung | 2019-04-18 | 1 | -2/+2 |
| | | | | | | | | | | | | | This reverts commit 9a6da9a79a22e984ee3eec02caa230b66f10e11a. | ||||
| | | * | synth_* with -retime option now calls abc with -D 1 as well | Eddie Hung | 2019-04-10 | 1 | -2/+2 |
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| * | | | Add comments | Eddie Hung | 2019-04-21 | 1 | -0/+7 |
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| * | | | Use new pmux2shiftx from #944, remove my old attempt | Eddie Hung | 2019-04-21 | 1 | -3/+8 |
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| * | | | Call shregmap twice -- once for variable, another for fixed | Eddie Hung | 2019-04-05 | 1 | -8/+11 |
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| * | | | Move dffinit til after abc | Eddie Hung | 2019-04-05 | 1 | -2/+2 |
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| * | | | Merge branch 'eddie/fix_retime' into xc7srl | Eddie Hung | 2019-04-05 | 1 | -7/+8 |
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| | * | | Move techamp t:$_DFF_?N? to before abc call | Eddie Hung | 2019-04-05 | 1 | -2/+2 |
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| | * | | Resolve @daveshah1 comment, update synth_xilinx help | Eddie Hung | 2019-04-05 | 1 | -3/+5 |
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| | * | | synth_xilinx to techmap FFs after abc call, otherwise -retime fails | Eddie Hung | 2019-04-05 | 1 | -3/+3 |
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| * | | | techmap inside map_cells stage | Eddie Hung | 2019-04-05 | 1 | -1/+1 |
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| * | | | Merge branch 'map_cells_before_map_luts' into xc7srl | Eddie Hung | 2019-04-04 | 1 | -0/+1 |
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| | * | | Missing techmap entry in help | Eddie Hung | 2019-04-04 | 1 | -0/+1 |
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| * | | | Merge branch 'map_cells_before_map_luts' into xc7srl | Eddie Hung | 2019-04-04 | 1 | -12/+12 |
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| | * | | synth_xilinx to map_cells before map_luts | Eddie Hung | 2019-04-04 | 1 | -12/+12 |
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| * | | t:$dff* -> t:$dff t:$dffe | Eddie Hung | 2019-04-04 | 1 | -2/+2 |
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| * | | -nosrl meant when -nobram | Eddie Hung | 2019-04-03 | 1 | -1/+1 |
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| * | | Disable shregmap in synth_xilinx if -retime | Eddie Hung | 2019-04-03 | 1 | -3/+3 |
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| * | | synth_xilinx to use shregmap with -minlen 3 | Eddie Hung | 2019-03-25 | 1 | -2/+2 |
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| * | | Add '-nosrl' option to synth_xilinx | Eddie Hung | 2019-03-21 | 1 | -6/+16 |
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| * | | Restore original synth_xilinx commands | Eddie Hung | 2019-03-19 | 1 | -1/+2 |
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| * | | Merge remote-tracking branch 'origin/master' into xc7srl | Eddie Hung | 2019-03-19 | 1 | -2/+4 |
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| | * | Add Xilinx negedge FFs to synth_xilinx dffinit call, fixes #873 | Clifford Wolf | 2019-03-19 | 1 | -2/+4 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | Cleanup synth_xilinx | Eddie Hung | 2019-03-15 | 1 | -2/+1 |
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| * | | Working | Eddie Hung | 2019-03-15 | 1 | -7/+9 |
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| * | | Misspell | Eddie Hung | 2019-03-14 | 1 | -1/+1 |
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| * | | Revert "Add shregmap -init_msb_first and use in synth_xilinx" | Eddie Hung | 2019-03-14 | 1 | -3/+2 |
| | | | | | | | | | This reverts commit 26ecbc1aee1dca1c186ab2b51835d74f67bc3e75. | ||||
| * | | Merge remote-tracking branch 'origin/master' into xc7srl | Eddie Hung | 2019-03-14 | 1 | -16/+54 |
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| | * | Merge pull request #842 from litghost/merge_upstream | Clifford Wolf | 2019-03-05 | 1 | -16/+52 |
| | |\ | | | | | | | Changes required for VPR place and route in synth_xilinx | ||||
| | | * | Use singular for disabling of DRAM or BRAM inference. | Keith Rothman | 2019-03-01 | 1 | -13/+13 |
| | | | | | | | | | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> | ||||
| | | * | Modify arguments to match existing style. | Keith Rothman | 2019-03-01 | 1 | -6/+6 |
| | | | | | | | | | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> | ||||
| | | * | Changes required for VPR place and route synth_xilinx. | Keith Rothman | 2019-03-01 | 1 | -16/+52 |
| | | | | | | | | | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> | ||||
| | * | | Use "write_edif -pvector bra" for Xilinx EDIF files | Clifford Wolf | 2019-03-05 | 1 | -1/+1 |
| | |/ | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | Add shregmap -init_msb_first and use in synth_xilinx | Eddie Hung | 2019-03-14 | 1 | -2/+2 |
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| * | | Move shregmap until after first techmap | Eddie Hung | 2019-03-13 | 1 | -2/+2 |
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| * | | synth_xilinx to call shregmap with enable support | Eddie Hung | 2019-02-28 | 1 | -1/+1 |
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| * | | synth_xilinx to use shregmap with -params too | Eddie Hung | 2019-02-28 | 1 | -1/+1 |
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| * | | synth_xilinx to now have shregmap call after dff2dffe | Eddie Hung | 2019-02-28 | 1 | -0/+2 |
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| * | Fix typographical and grammatical errors and inconsistencies. | whitequark | 2019-01-02 | 1 | -1/+1 |
| | | | | | | | | | | | | | The initial list of hits was generated with the codespell command below, and each hit was evaluated and fixed manually while taking context into consideration. DIRS="kernel/ frontends/ backends/ passes/ techlibs/" DIRS="${DIRS} libs/ezsat/ libs/subcircuit" codespell $DIRS -S *.o -L upto,iff,thru,synopsys,uint More hits were found by looking through comments and strings manually. | ||||
| * | xilinx: Still map LUT7/LUT8 to Xilinx specific primitives. | Tim 'mithro' Ansell | 2018-10-08 | 1 | -3/+2 |
| | | | | | | Then if targeting vpr map all the Xilinx specific LUTs back into generic Yosys LUTs. | ||||
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index : iCE40/yosys | |
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