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* sign extend 32b literals
* Fix undefined behavior
Right shift of a signed values is undefined but does
arithemetic shift in practice.
However, shifting by more than one int width
is also undefined but *wraps around*.
This caused bit/log to work because it'd shift mod 32.
But it actually cause the UL32 to be wrong
because it'd just repeat the value rather than extending.
* zero pad unsigned and add signed
* add testsuite
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* Add Id_Neg support
* Add testcase for Id_Neg
Thanks to Pepijn for the example I based this on.
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* Add Id_Smul and Id_Umul support
* Add testcase for Id_Smul and Id_Umul
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* Add formal tests for shift operations
* ci: build ghdl/synth:formal and run test suites in it
* add testsuite/formal/testsuite.sh
* create testsuite/issues
* ci: remove a level of grouping
* testenv: fix SYMBIYOSYS
* refactor
* testsuite/formal/shifts: Add check for shifts > vector length
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* added UART example for the icestick
* extended testsuite by the UART example
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* makefile: use '--build' shortcut to build ghdl.so
* move: rename subdir 'ghdl' to 'src'
* travis: add travis config file, build script and utils script
* testsuite: do not call ghdl explicitly
* readme: update
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